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   <div id="projectname">CMSIS-Core (Cortex-A)
   &#160;<span id="projectnumber">Version 1.1.4</span>
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   <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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<p>CMSIS Cortex-A Core Peripheral Access Layer Header File.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCPSR__Type.html">CPSR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for CPSR layout.  <a href="unionCPSR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionSCTLR__Type.html">SCTLR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for SCTLR layout.  <a href="unionSCTLR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionACTLR__Type.html">ACTLR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for ACTLR layout.  <a href="unionACTLR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCPACR__Type.html">CPACR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for CPACR layout.  <a href="unionCPACR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDFSR__Type.html">DFSR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for DFSR layout.  <a href="unionDFSR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionIFSR__Type.html">IFSR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for IFSR layout.  <a href="unionIFSR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionISR__Type.html">ISR_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for ISR layout.  <a href="unionISR__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structL2C__310__TypeDef.html">L2C_310_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Union type to access the L2C_310 Cache Controller.  <a href="structL2C__310__TypeDef.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Generic Interrupt Controller Distributor (GICD)  <a href="structGICDistributor__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structGICInterface__Type.html">GICInterface_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Generic Interrupt Controller Interface (GICC)  <a href="structGICInterface__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structTimer__Type.html">Timer_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Private Timer.  <a href="structTimer__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCNTP__CTL__Type.html">CNTP_CTL_Type</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Physical Timer Control register.  <a href="unionCNTP__CTL__Type.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structmmu__region__attributes__Type.html">mmu_region_attributes_Type</a></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:af6738f04c5c33edae09174f235ef3e14"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#af6738f04c5c33edae09174f235ef3e14">__CORE_CA_H_GENERIC</a></td></tr>
<tr class="separator:af6738f04c5c33edae09174f235ef3e14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga519092cc80304900838f3d79a1a04e36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__ctrl.html#ga519092cc80304900838f3d79a1a04e36">__CA_CMSIS_VERSION_MAIN</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:ga519092cc80304900838f3d79a1a04e36"><td class="mdescLeft">&#160;</td><td class="mdescRight">[31:16] CMSIS-Core(A) main version  <a href="group__version__ctrl.html#ga519092cc80304900838f3d79a1a04e36">More...</a><br/></td></tr>
<tr class="separator:ga519092cc80304900838f3d79a1a04e36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca4690227a53e24645758cdab9a00cdf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__ctrl.html#gaca4690227a53e24645758cdab9a00cdf">__CA_CMSIS_VERSION_SUB</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:gaca4690227a53e24645758cdab9a00cdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">[15:0] CMSIS-Core(A) sub version  <a href="group__version__ctrl.html#gaca4690227a53e24645758cdab9a00cdf">More...</a><br/></td></tr>
<tr class="separator:gaca4690227a53e24645758cdab9a00cdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60199f17babba1ac0cf233e59043b23b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__ctrl.html#ga60199f17babba1ac0cf233e59043b23b">__CA_CMSIS_VERSION</a></td></tr>
<tr class="memdesc:ga60199f17babba1ac0cf233e59043b23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CMSIS-Core(A) version number.  <a href="group__version__ctrl.html#ga60199f17babba1ac0cf233e59043b23b">More...</a><br/></td></tr>
<tr class="separator:ga60199f17babba1ac0cf233e59043b23b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa167d0f532a7c2b2e3a6395db2fa0776"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#aa167d0f532a7c2b2e3a6395db2fa0776">__FPU_USED</a>&#160;&#160;&#160;0U</td></tr>
<tr class="separator:aa167d0f532a7c2b2e3a6395db2fa0776"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:add5658d95f6b79934202e6fbf1795b12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#add5658d95f6b79934202e6fbf1795b12">__CORE_CA_H_DEPENDANT</a></td></tr>
<tr class="separator:add5658d95f6b79934202e6fbf1795b12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1ba8a48ca926bddc88be9bfd7d42641"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a>&#160;&#160;&#160;0U</td></tr>
<tr class="separator:ac1ba8a48ca926bddc88be9bfd7d42641"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6690a7e24ea0ec4b36a8fb077d01a820"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a6690a7e24ea0ec4b36a8fb077d01a820">__GIC_PRESENT</a>&#160;&#160;&#160;1U</td></tr>
<tr class="separator:a6690a7e24ea0ec4b36a8fb077d01a820"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0e57ca9f1bc10c2de05d383d2c76267a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a0e57ca9f1bc10c2de05d383d2c76267a">__TIM_PRESENT</a>&#160;&#160;&#160;1U</td></tr>
<tr class="separator:a0e57ca9f1bc10c2de05d383d2c76267a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af63697ed9952cc71e1225efe205f6cd3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#af63697ed9952cc71e1225efe205f6cd3">__I</a>&#160;&#160;&#160;volatile</td></tr>
<tr class="memdesc:af63697ed9952cc71e1225efe205f6cd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Defines 'read only' permissions.  <a href="#af63697ed9952cc71e1225efe205f6cd3">More...</a><br/></td></tr>
<tr class="separator:af63697ed9952cc71e1225efe205f6cd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7e25d9380f9ef903923964322e71f2f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a7e25d9380f9ef903923964322e71f2f6">__O</a>&#160;&#160;&#160;volatile</td></tr>
<tr class="memdesc:a7e25d9380f9ef903923964322e71f2f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Defines 'write only' permissions.  <a href="#a7e25d9380f9ef903923964322e71f2f6">More...</a><br/></td></tr>
<tr class="separator:a7e25d9380f9ef903923964322e71f2f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aec43007d9998a0a0e01faede4133d6be"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a>&#160;&#160;&#160;volatile</td></tr>
<tr class="memdesc:aec43007d9998a0a0e01faede4133d6be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Defines 'read / write' permissions.  <a href="#aec43007d9998a0a0e01faede4133d6be">More...</a><br/></td></tr>
<tr class="separator:aec43007d9998a0a0e01faede4133d6be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4cc1649793116d7c2d8afce7a4ffce43"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a4cc1649793116d7c2d8afce7a4ffce43">__IM</a>&#160;&#160;&#160;volatile const</td></tr>
<tr class="memdesc:a4cc1649793116d7c2d8afce7a4ffce43"><td class="mdescLeft">&#160;</td><td class="mdescRight">Defines 'read only' structure member permissions.  <a href="#a4cc1649793116d7c2d8afce7a4ffce43">More...</a><br/></td></tr>
<tr class="separator:a4cc1649793116d7c2d8afce7a4ffce43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0ea2009ed8fd9ef35b48708280fdb758"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a0ea2009ed8fd9ef35b48708280fdb758">__OM</a>&#160;&#160;&#160;volatile</td></tr>
<tr class="memdesc:a0ea2009ed8fd9ef35b48708280fdb758"><td class="mdescLeft">&#160;</td><td class="mdescRight">Defines 'write only' structure member permissions.  <a href="#a0ea2009ed8fd9ef35b48708280fdb758">More...</a><br/></td></tr>
<tr class="separator:a0ea2009ed8fd9ef35b48708280fdb758"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab6caba5853a60a17e8e04499b52bf691"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ab6caba5853a60a17e8e04499b52bf691">__IOM</a>&#160;&#160;&#160;volatile</td></tr>
<tr class="memdesc:ab6caba5853a60a17e8e04499b52bf691"><td class="mdescLeft">&#160;</td><td class="mdescRight">Defines 'read / write' structure member permissions.  <a href="#ab6caba5853a60a17e8e04499b52bf691">More...</a><br/></td></tr>
<tr class="separator:ab6caba5853a60a17e8e04499b52bf691"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7f66fda711fd46e157dbb6c1af88e04"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#af7f66fda711fd46e157dbb6c1af88e04">RESERVED</a>(N, T)&#160;&#160;&#160;T RESERVED##N;</td></tr>
<tr class="separator:af7f66fda711fd46e157dbb6c1af88e04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaedc00ebe496885524daac4190742f84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gaaedc00ebe496885524daac4190742f84">CPSR_N_Pos</a>&#160;&#160;&#160;31U</td></tr>
<tr class="memdesc:gaaedc00ebe496885524daac4190742f84"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: N Position.  <a href="group__CMSIS__CPSR__BITS.html#gaaedc00ebe496885524daac4190742f84">More...</a><br/></td></tr>
<tr class="separator:gaaedc00ebe496885524daac4190742f84"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6c4a636a3b5ec71e0f2eb021ac353544"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6c4a636a3b5ec71e0f2eb021ac353544">CPSR_N_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_N_Pos)</td></tr>
<tr class="memdesc:ga6c4a636a3b5ec71e0f2eb021ac353544"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: N Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga6c4a636a3b5ec71e0f2eb021ac353544">More...</a><br/></td></tr>
<tr class="separator:ga6c4a636a3b5ec71e0f2eb021ac353544"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18e9f21fcda9d385d23a4de0ef860cd4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga18e9f21fcda9d385d23a4de0ef860cd4">CPSR_Z_Pos</a>&#160;&#160;&#160;30U</td></tr>
<tr class="memdesc:ga18e9f21fcda9d385d23a4de0ef860cd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Z Position.  <a href="group__CMSIS__CPSR__BITS.html#ga18e9f21fcda9d385d23a4de0ef860cd4">More...</a><br/></td></tr>
<tr class="separator:ga18e9f21fcda9d385d23a4de0ef860cd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab091112988009fb8360b01c79d993f67"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gab091112988009fb8360b01c79d993f67">CPSR_Z_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_Z_Pos)</td></tr>
<tr class="memdesc:gab091112988009fb8360b01c79d993f67"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Z Mask.  <a href="group__CMSIS__CPSR__BITS.html#gab091112988009fb8360b01c79d993f67">More...</a><br/></td></tr>
<tr class="separator:gab091112988009fb8360b01c79d993f67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8565df3cf054dc09506e1c0ea4790131"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131">CPSR_C_Pos</a>&#160;&#160;&#160;29U</td></tr>
<tr class="memdesc:ga8565df3cf054dc09506e1c0ea4790131"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: C Position.  <a href="group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131">More...</a><br/></td></tr>
<tr class="separator:ga8565df3cf054dc09506e1c0ea4790131"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3bc30b14b9b0bf113600eb882304244c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga3bc30b14b9b0bf113600eb882304244c">CPSR_C_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_C_Pos)</td></tr>
<tr class="memdesc:ga3bc30b14b9b0bf113600eb882304244c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: C Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga3bc30b14b9b0bf113600eb882304244c">More...</a><br/></td></tr>
<tr class="separator:ga3bc30b14b9b0bf113600eb882304244c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5685fa5745113b4ff61181ee439bc2a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5">CPSR_V_Pos</a>&#160;&#160;&#160;28U</td></tr>
<tr class="memdesc:ga5685fa5745113b4ff61181ee439bc2a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: V Position.  <a href="group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5">More...</a><br/></td></tr>
<tr class="separator:ga5685fa5745113b4ff61181ee439bc2a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga9b9fe5c1da5e922cbff18215b70b4252">CPSR_V_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_V_Pos)</td></tr>
<tr class="memdesc:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: V Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga9b9fe5c1da5e922cbff18215b70b4252">More...</a><br/></td></tr>
<tr class="separator:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84c8427c30fdce15f7191bd4f93d7ab7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga84c8427c30fdce15f7191bd4f93d7ab7">CPSR_Q_Pos</a>&#160;&#160;&#160;27U</td></tr>
<tr class="memdesc:ga84c8427c30fdce15f7191bd4f93d7ab7"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Q Position.  <a href="group__CMSIS__CPSR__BITS.html#ga84c8427c30fdce15f7191bd4f93d7ab7">More...</a><br/></td></tr>
<tr class="separator:ga84c8427c30fdce15f7191bd4f93d7ab7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba36b1ac0438594afdc6eef220d2e146"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gaba36b1ac0438594afdc6eef220d2e146">CPSR_Q_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_Q_Pos)</td></tr>
<tr class="memdesc:gaba36b1ac0438594afdc6eef220d2e146"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Q Mask.  <a href="group__CMSIS__CPSR__BITS.html#gaba36b1ac0438594afdc6eef220d2e146">More...</a><br/></td></tr>
<tr class="separator:gaba36b1ac0438594afdc6eef220d2e146"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga450f3fff0642431fd3478a04b70c3d87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga450f3fff0642431fd3478a04b70c3d87">CPSR_IT0_Pos</a>&#160;&#160;&#160;25U</td></tr>
<tr class="memdesc:ga450f3fff0642431fd3478a04b70c3d87"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT0 Position.  <a href="group__CMSIS__CPSR__BITS.html#ga450f3fff0642431fd3478a04b70c3d87">More...</a><br/></td></tr>
<tr class="separator:ga450f3fff0642431fd3478a04b70c3d87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga128366788d0f94d52fbe4610162c97e5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga128366788d0f94d52fbe4610162c97e5">CPSR_IT0_Msk</a>&#160;&#160;&#160;(3UL &lt;&lt; CPSR_IT0_Pos)</td></tr>
<tr class="memdesc:ga128366788d0f94d52fbe4610162c97e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT0 Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga128366788d0f94d52fbe4610162c97e5">More...</a><br/></td></tr>
<tr class="separator:ga128366788d0f94d52fbe4610162c97e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b49ddfb770143a51aa682b56be2e990"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6b49ddfb770143a51aa682b56be2e990">CPSR_J_Pos</a>&#160;&#160;&#160;24U</td></tr>
<tr class="memdesc:ga6b49ddfb770143a51aa682b56be2e990"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: J Position.  <a href="group__CMSIS__CPSR__BITS.html#ga6b49ddfb770143a51aa682b56be2e990">More...</a><br/></td></tr>
<tr class="separator:ga6b49ddfb770143a51aa682b56be2e990"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b52a05ec2e95ade71b65090f19285c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6b52a05ec2e95ade71b65090f19285c2">CPSR_J_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_J_Pos)</td></tr>
<tr class="memdesc:ga6b52a05ec2e95ade71b65090f19285c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: J Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga6b52a05ec2e95ade71b65090f19285c2">More...</a><br/></td></tr>
<tr class="separator:ga6b52a05ec2e95ade71b65090f19285c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga37aa76465f6c6055395790e74169d760"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga37aa76465f6c6055395790e74169d760">CPSR_GE_Pos</a>&#160;&#160;&#160;16U</td></tr>
<tr class="memdesc:ga37aa76465f6c6055395790e74169d760"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: GE Position.  <a href="group__CMSIS__CPSR__BITS.html#ga37aa76465f6c6055395790e74169d760">More...</a><br/></td></tr>
<tr class="separator:ga37aa76465f6c6055395790e74169d760"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a3a6a87437892954cb37662ff27521a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga9a3a6a87437892954cb37662ff27521a">CPSR_GE_Msk</a>&#160;&#160;&#160;(0xFUL &lt;&lt; CPSR_GE_Pos)</td></tr>
<tr class="memdesc:ga9a3a6a87437892954cb37662ff27521a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: GE Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga9a3a6a87437892954cb37662ff27521a">More...</a><br/></td></tr>
<tr class="separator:ga9a3a6a87437892954cb37662ff27521a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2ab21d87052b439c06f058fb65036a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gaa2ab21d87052b439c06f058fb65036a5">CPSR_IT1_Pos</a>&#160;&#160;&#160;10U</td></tr>
<tr class="memdesc:gaa2ab21d87052b439c06f058fb65036a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT1 Position.  <a href="group__CMSIS__CPSR__BITS.html#gaa2ab21d87052b439c06f058fb65036a5">More...</a><br/></td></tr>
<tr class="separator:gaa2ab21d87052b439c06f058fb65036a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga791263c8a9707795b5824dae5485cd39"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga791263c8a9707795b5824dae5485cd39">CPSR_IT1_Msk</a>&#160;&#160;&#160;(0x3FUL &lt;&lt; CPSR_IT1_Pos)</td></tr>
<tr class="memdesc:ga791263c8a9707795b5824dae5485cd39"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT1 Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga791263c8a9707795b5824dae5485cd39">More...</a><br/></td></tr>
<tr class="separator:ga791263c8a9707795b5824dae5485cd39"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">CPSR_E_Pos</a>&#160;&#160;&#160;9U</td></tr>
<tr class="memdesc:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: E Position.  <a href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">More...</a><br/></td></tr>
<tr class="separator:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6661712dd33a50ce4a42e13bf72aa35b">CPSR_E_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_E_Pos)</td></tr>
<tr class="memdesc:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: E Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga6661712dd33a50ce4a42e13bf72aa35b">More...</a><br/></td></tr>
<tr class="separator:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>&#160;&#160;&#160;8U</td></tr>
<tr class="memdesc:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: A Position.  <a href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">More...</a><br/></td></tr>
<tr class="separator:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga002803fa282333e0ead5c9b4cf748cb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga002803fa282333e0ead5c9b4cf748cb1">CPSR_A_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_A_Pos)</td></tr>
<tr class="memdesc:ga002803fa282333e0ead5c9b4cf748cb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: A Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga002803fa282333e0ead5c9b4cf748cb1">More...</a><br/></td></tr>
<tr class="separator:ga002803fa282333e0ead5c9b4cf748cb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1d9be2f731f5400fc87076ce3495e59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>&#160;&#160;&#160;7U</td></tr>
<tr class="memdesc:gad1d9be2f731f5400fc87076ce3495e59"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: I Position.  <a href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">More...</a><br/></td></tr>
<tr class="separator:gad1d9be2f731f5400fc87076ce3495e59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad9abe93ba1179e254a70e325cb1a5834"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gad9abe93ba1179e254a70e325cb1a5834">CPSR_I_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_I_Pos)</td></tr>
<tr class="memdesc:gad9abe93ba1179e254a70e325cb1a5834"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: I Mask.  <a href="group__CMSIS__CPSR__BITS.html#gad9abe93ba1179e254a70e325cb1a5834">More...</a><br/></td></tr>
<tr class="separator:gad9abe93ba1179e254a70e325cb1a5834"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>&#160;&#160;&#160;6U</td></tr>
<tr class="memdesc:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: F Position.  <a href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">More...</a><br/></td></tr>
<tr class="separator:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4df09481ffd9dfb17823a8e9895b1566"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga4df09481ffd9dfb17823a8e9895b1566">CPSR_F_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_F_Pos)</td></tr>
<tr class="memdesc:ga4df09481ffd9dfb17823a8e9895b1566"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: F Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga4df09481ffd9dfb17823a8e9895b1566">More...</a><br/></td></tr>
<tr class="separator:ga4df09481ffd9dfb17823a8e9895b1566"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa1134ff3e774b1354a43227b798a707c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>&#160;&#160;&#160;5U</td></tr>
<tr class="memdesc:gaa1134ff3e774b1354a43227b798a707c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: T Position.  <a href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">More...</a><br/></td></tr>
<tr class="separator:gaa1134ff3e774b1354a43227b798a707c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga23ed422711cbd2f9a5dcbe6c05b2a720">CPSR_T_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPSR_T_Pos)</td></tr>
<tr class="memdesc:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: T Mask.  <a href="group__CMSIS__CPSR__BITS.html#ga23ed422711cbd2f9a5dcbe6c05b2a720">More...</a><br/></td></tr>
<tr class="separator:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Position.  <a href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">More...</a><br/></td></tr>
<tr class="separator:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadce47959b814f70f802a139250daa04c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gadce47959b814f70f802a139250daa04c">CPSR_M_Msk</a>&#160;&#160;&#160;(0x1FUL &lt;&lt; CPSR_M_Pos)</td></tr>
<tr class="memdesc:gadce47959b814f70f802a139250daa04c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Mask.  <a href="group__CMSIS__CPSR__BITS.html#gadce47959b814f70f802a139250daa04c">More...</a><br/></td></tr>
<tr class="separator:gadce47959b814f70f802a139250daa04c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad716a0ee4dc815f0f01e1339d6511a4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#gad716a0ee4dc815f0f01e1339d6511a4e">CPSR_M_USR</a>&#160;&#160;&#160;0x10U</td></tr>
<tr class="memdesc:gad716a0ee4dc815f0f01e1339d6511a4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M User mode (PL0)  <a href="group__CMSIS__CPSR__M.html#gad716a0ee4dc815f0f01e1339d6511a4e">More...</a><br/></td></tr>
<tr class="separator:gad716a0ee4dc815f0f01e1339d6511a4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga868ef12e003f541f90a613ca7f6ada74"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#ga868ef12e003f541f90a613ca7f6ada74">CPSR_M_FIQ</a>&#160;&#160;&#160;0x11U</td></tr>
<tr class="memdesc:ga868ef12e003f541f90a613ca7f6ada74"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Fast Interrupt mode (PL1)  <a href="group__CMSIS__CPSR__M.html#ga868ef12e003f541f90a613ca7f6ada74">More...</a><br/></td></tr>
<tr class="separator:ga868ef12e003f541f90a613ca7f6ada74"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada3f31a773f7fc7bf6567d598cf3a1db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#gada3f31a773f7fc7bf6567d598cf3a1db">CPSR_M_IRQ</a>&#160;&#160;&#160;0x12U</td></tr>
<tr class="memdesc:gada3f31a773f7fc7bf6567d598cf3a1db"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Interrupt mode (PL1)  <a href="group__CMSIS__CPSR__M.html#gada3f31a773f7fc7bf6567d598cf3a1db">More...</a><br/></td></tr>
<tr class="separator:gada3f31a773f7fc7bf6567d598cf3a1db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5afcb85bd2968acc2b09cb9d99c531ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#ga5afcb85bd2968acc2b09cb9d99c531ad">CPSR_M_SVC</a>&#160;&#160;&#160;0x13U</td></tr>
<tr class="memdesc:ga5afcb85bd2968acc2b09cb9d99c531ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Supervisor mode (PL1)  <a href="group__CMSIS__CPSR__M.html#ga5afcb85bd2968acc2b09cb9d99c531ad">More...</a><br/></td></tr>
<tr class="separator:ga5afcb85bd2968acc2b09cb9d99c531ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga69d734db93f67899b4bffcf62f80f098"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#ga69d734db93f67899b4bffcf62f80f098">CPSR_M_MON</a>&#160;&#160;&#160;0x16U</td></tr>
<tr class="memdesc:ga69d734db93f67899b4bffcf62f80f098"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Monitor mode (PL1)  <a href="group__CMSIS__CPSR__M.html#ga69d734db93f67899b4bffcf62f80f098">More...</a><br/></td></tr>
<tr class="separator:ga69d734db93f67899b4bffcf62f80f098"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8c0a99a21ef256f5d3115595a845bfa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#gac8c0a99a21ef256f5d3115595a845bfa">CPSR_M_ABT</a>&#160;&#160;&#160;0x17U</td></tr>
<tr class="memdesc:gac8c0a99a21ef256f5d3115595a845bfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Abort mode (PL1)  <a href="group__CMSIS__CPSR__M.html#gac8c0a99a21ef256f5d3115595a845bfa">More...</a><br/></td></tr>
<tr class="separator:gac8c0a99a21ef256f5d3115595a845bfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga002c78f542ca5c5fdd02d2aeee9f6988"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#ga002c78f542ca5c5fdd02d2aeee9f6988">CPSR_M_HYP</a>&#160;&#160;&#160;0x1AU</td></tr>
<tr class="memdesc:ga002c78f542ca5c5fdd02d2aeee9f6988"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Hypervisor mode (PL2)  <a href="group__CMSIS__CPSR__M.html#ga002c78f542ca5c5fdd02d2aeee9f6988">More...</a><br/></td></tr>
<tr class="separator:ga002c78f542ca5c5fdd02d2aeee9f6988"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga07d4f42d6971c2f0cc25872008ddf5ef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#ga07d4f42d6971c2f0cc25872008ddf5ef">CPSR_M_UND</a>&#160;&#160;&#160;0x1BU</td></tr>
<tr class="memdesc:ga07d4f42d6971c2f0cc25872008ddf5ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Undefined mode (PL1)  <a href="group__CMSIS__CPSR__M.html#ga07d4f42d6971c2f0cc25872008ddf5ef">More...</a><br/></td></tr>
<tr class="separator:ga07d4f42d6971c2f0cc25872008ddf5ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa0a3996ce096cd205bce34f90b10912c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html#gaa0a3996ce096cd205bce34f90b10912c">CPSR_M_SYS</a>&#160;&#160;&#160;0x1FU</td></tr>
<tr class="memdesc:gaa0a3996ce096cd205bce34f90b10912c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M System mode (PL1)  <a href="group__CMSIS__CPSR__M.html#gaa0a3996ce096cd205bce34f90b10912c">More...</a><br/></td></tr>
<tr class="separator:gaa0a3996ce096cd205bce34f90b10912c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0a611e2359e04624379e1ddd4dc64b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gab0a611e2359e04624379e1ddd4dc64b1">SCTLR_TE_Pos</a>&#160;&#160;&#160;30U</td></tr>
<tr class="memdesc:gab0a611e2359e04624379e1ddd4dc64b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: TE Position.  <a href="group__CMSIS__SCTLR__BITS.html#gab0a611e2359e04624379e1ddd4dc64b1">More...</a><br/></td></tr>
<tr class="separator:gab0a611e2359e04624379e1ddd4dc64b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4a68d6660c76951ada2541ceaf040b3b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga4a68d6660c76951ada2541ceaf040b3b">SCTLR_TE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_TE_Pos)</td></tr>
<tr class="memdesc:ga4a68d6660c76951ada2541ceaf040b3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: TE Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga4a68d6660c76951ada2541ceaf040b3b">More...</a><br/></td></tr>
<tr class="separator:ga4a68d6660c76951ada2541ceaf040b3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ac80ef4db2641dc9e6e8df0825a151e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga4ac80ef4db2641dc9e6e8df0825a151e">SCTLR_AFE_Pos</a>&#160;&#160;&#160;29U</td></tr>
<tr class="memdesc:ga4ac80ef4db2641dc9e6e8df0825a151e"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: AFE Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga4ac80ef4db2641dc9e6e8df0825a151e">More...</a><br/></td></tr>
<tr class="separator:ga4ac80ef4db2641dc9e6e8df0825a151e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9016d6e50562d2584c1f1a95bde1e957"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga9016d6e50562d2584c1f1a95bde1e957">SCTLR_AFE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_AFE_Pos)</td></tr>
<tr class="memdesc:ga9016d6e50562d2584c1f1a95bde1e957"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: AFE Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga9016d6e50562d2584c1f1a95bde1e957">More...</a><br/></td></tr>
<tr class="separator:ga9016d6e50562d2584c1f1a95bde1e957"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf76fa48119363f9b88c2c8f5b74e0a04"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaf76fa48119363f9b88c2c8f5b74e0a04">SCTLR_TRE_Pos</a>&#160;&#160;&#160;28U</td></tr>
<tr class="memdesc:gaf76fa48119363f9b88c2c8f5b74e0a04"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: TRE Position.  <a href="group__CMSIS__SCTLR__BITS.html#gaf76fa48119363f9b88c2c8f5b74e0a04">More...</a><br/></td></tr>
<tr class="separator:gaf76fa48119363f9b88c2c8f5b74e0a04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0481eb9812a4908601cb20c8ae84918"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gab0481eb9812a4908601cb20c8ae84918">SCTLR_TRE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_TRE_Pos)</td></tr>
<tr class="memdesc:gab0481eb9812a4908601cb20c8ae84918"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: TRE Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gab0481eb9812a4908601cb20c8ae84918">More...</a><br/></td></tr>
<tr class="separator:gab0481eb9812a4908601cb20c8ae84918"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1cf872c51ed0baa6ed23e26c1ed35a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gac1cf872c51ed0baa6ed23e26c1ed35a9">SCTLR_NMFI_Pos</a>&#160;&#160;&#160;27U</td></tr>
<tr class="memdesc:gac1cf872c51ed0baa6ed23e26c1ed35a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: NMFI Position.  <a href="group__CMSIS__SCTLR__BITS.html#gac1cf872c51ed0baa6ed23e26c1ed35a9">More...</a><br/></td></tr>
<tr class="separator:gac1cf872c51ed0baa6ed23e26c1ed35a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab92a3bd63ad9ac3d408e1b615bedc279"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gab92a3bd63ad9ac3d408e1b615bedc279">SCTLR_NMFI_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_NMFI_Pos)</td></tr>
<tr class="memdesc:gab92a3bd63ad9ac3d408e1b615bedc279"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: NMFI Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gab92a3bd63ad9ac3d408e1b615bedc279">More...</a><br/></td></tr>
<tr class="separator:gab92a3bd63ad9ac3d408e1b615bedc279"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0baec19421bd41277c5d8783c59942fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga0baec19421bd41277c5d8783c59942fa">SCTLR_EE_Pos</a>&#160;&#160;&#160;25U</td></tr>
<tr class="memdesc:ga0baec19421bd41277c5d8783c59942fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: EE Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga0baec19421bd41277c5d8783c59942fa">More...</a><br/></td></tr>
<tr class="separator:ga0baec19421bd41277c5d8783c59942fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d95cd61bc40dc77f8855f40c797d044"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga8d95cd61bc40dc77f8855f40c797d044">SCTLR_EE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_EE_Pos)</td></tr>
<tr class="memdesc:ga8d95cd61bc40dc77f8855f40c797d044"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: EE Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga8d95cd61bc40dc77f8855f40c797d044">More...</a><br/></td></tr>
<tr class="separator:ga8d95cd61bc40dc77f8855f40c797d044"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1372b569553a0740d881e24c0be7334f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga1372b569553a0740d881e24c0be7334f">SCTLR_VE_Pos</a>&#160;&#160;&#160;24U</td></tr>
<tr class="memdesc:ga1372b569553a0740d881e24c0be7334f"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: VE Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga1372b569553a0740d881e24c0be7334f">More...</a><br/></td></tr>
<tr class="separator:ga1372b569553a0740d881e24c0be7334f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad94a7feadba850299a68c56e39c0b274"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gad94a7feadba850299a68c56e39c0b274">SCTLR_VE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_VE_Pos)</td></tr>
<tr class="memdesc:gad94a7feadba850299a68c56e39c0b274"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: VE Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gad94a7feadba850299a68c56e39c0b274">More...</a><br/></td></tr>
<tr class="separator:gad94a7feadba850299a68c56e39c0b274"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa0431730d7ce929db03d8accee558e17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaa0431730d7ce929db03d8accee558e17">SCTLR_U_Pos</a>&#160;&#160;&#160;22U</td></tr>
<tr class="memdesc:gaa0431730d7ce929db03d8accee558e17"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: U Position.  <a href="group__CMSIS__SCTLR__BITS.html#gaa0431730d7ce929db03d8accee558e17">More...</a><br/></td></tr>
<tr class="separator:gaa0431730d7ce929db03d8accee558e17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa047daa7ab35b5ad5dd238c7377a232f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaa047daa7ab35b5ad5dd238c7377a232f">SCTLR_U_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_U_Pos)</td></tr>
<tr class="memdesc:gaa047daa7ab35b5ad5dd238c7377a232f"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: U Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gaa047daa7ab35b5ad5dd238c7377a232f">More...</a><br/></td></tr>
<tr class="separator:gaa047daa7ab35b5ad5dd238c7377a232f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad88d563fa9a8b09fe36702a5329b0360"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gad88d563fa9a8b09fe36702a5329b0360">SCTLR_FI_Pos</a>&#160;&#160;&#160;21U</td></tr>
<tr class="memdesc:gad88d563fa9a8b09fe36702a5329b0360"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: FI Position.  <a href="group__CMSIS__SCTLR__BITS.html#gad88d563fa9a8b09fe36702a5329b0360">More...</a><br/></td></tr>
<tr class="separator:gad88d563fa9a8b09fe36702a5329b0360"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga316b80925b88fe3b88ec46a55655b0bc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga316b80925b88fe3b88ec46a55655b0bc">SCTLR_FI_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_FI_Pos)</td></tr>
<tr class="memdesc:ga316b80925b88fe3b88ec46a55655b0bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: FI Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga316b80925b88fe3b88ec46a55655b0bc">More...</a><br/></td></tr>
<tr class="separator:ga316b80925b88fe3b88ec46a55655b0bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c7d88f3db4de438ddd069cf3fbc88b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga7c7d88f3db4de438ddd069cf3fbc88b3">SCTLR_UWXN_Pos</a>&#160;&#160;&#160;20U</td></tr>
<tr class="memdesc:ga7c7d88f3db4de438ddd069cf3fbc88b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: UWXN Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga7c7d88f3db4de438ddd069cf3fbc88b3">More...</a><br/></td></tr>
<tr class="separator:ga7c7d88f3db4de438ddd069cf3fbc88b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab834e64e0da7c2a98d747ce73252c199"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gab834e64e0da7c2a98d747ce73252c199">SCTLR_UWXN_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_UWXN_Pos)</td></tr>
<tr class="memdesc:gab834e64e0da7c2a98d747ce73252c199"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: UWXN Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gab834e64e0da7c2a98d747ce73252c199">More...</a><br/></td></tr>
<tr class="separator:gab834e64e0da7c2a98d747ce73252c199"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf145654986fd6d014136580ad279d256"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaf145654986fd6d014136580ad279d256">SCTLR_WXN_Pos</a>&#160;&#160;&#160;19U</td></tr>
<tr class="memdesc:gaf145654986fd6d014136580ad279d256"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: WXN Position.  <a href="group__CMSIS__SCTLR__BITS.html#gaf145654986fd6d014136580ad279d256">More...</a><br/></td></tr>
<tr class="separator:gaf145654986fd6d014136580ad279d256"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga510b03214d135f15ad3c5d41ec20a291"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga510b03214d135f15ad3c5d41ec20a291">SCTLR_WXN_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_WXN_Pos)</td></tr>
<tr class="memdesc:ga510b03214d135f15ad3c5d41ec20a291"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: WXN Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga510b03214d135f15ad3c5d41ec20a291">More...</a><br/></td></tr>
<tr class="separator:ga510b03214d135f15ad3c5d41ec20a291"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga316882abba6c9cdd31dbbd7ba46c9f52"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga316882abba6c9cdd31dbbd7ba46c9f52">SCTLR_HA_Pos</a>&#160;&#160;&#160;17U</td></tr>
<tr class="memdesc:ga316882abba6c9cdd31dbbd7ba46c9f52"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: HA Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga316882abba6c9cdd31dbbd7ba46c9f52">More...</a><br/></td></tr>
<tr class="separator:ga316882abba6c9cdd31dbbd7ba46c9f52"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6830e9bf54a6b548f329ac047f59c179"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga6830e9bf54a6b548f329ac047f59c179">SCTLR_HA_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_HA_Pos)</td></tr>
<tr class="memdesc:ga6830e9bf54a6b548f329ac047f59c179"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: HA Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga6830e9bf54a6b548f329ac047f59c179">More...</a><br/></td></tr>
<tr class="separator:ga6830e9bf54a6b548f329ac047f59c179"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86e5b78ba8f818061644688db75ddc64"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga86e5b78ba8f818061644688db75ddc64">SCTLR_RR_Pos</a>&#160;&#160;&#160;14U</td></tr>
<tr class="memdesc:ga86e5b78ba8f818061644688db75ddc64"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: RR Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga86e5b78ba8f818061644688db75ddc64">More...</a><br/></td></tr>
<tr class="separator:ga86e5b78ba8f818061644688db75ddc64"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1ff9e6766c7e1ca312b025bf34d384bc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga1ff9e6766c7e1ca312b025bf34d384bc">SCTLR_RR_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_RR_Pos)</td></tr>
<tr class="memdesc:ga1ff9e6766c7e1ca312b025bf34d384bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: RR Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga1ff9e6766c7e1ca312b025bf34d384bc">More...</a><br/></td></tr>
<tr class="separator:ga1ff9e6766c7e1ca312b025bf34d384bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga57778fd6afbe5b4fe8d8ea828acf833d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga57778fd6afbe5b4fe8d8ea828acf833d">SCTLR_V_Pos</a>&#160;&#160;&#160;13U</td></tr>
<tr class="memdesc:ga57778fd6afbe5b4fe8d8ea828acf833d"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: V Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga57778fd6afbe5b4fe8d8ea828acf833d">More...</a><br/></td></tr>
<tr class="separator:ga57778fd6afbe5b4fe8d8ea828acf833d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf84f3f15bf6917acdc5b5a4ad661ac11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaf84f3f15bf6917acdc5b5a4ad661ac11">SCTLR_V_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_V_Pos)</td></tr>
<tr class="memdesc:gaf84f3f15bf6917acdc5b5a4ad661ac11"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: V Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gaf84f3f15bf6917acdc5b5a4ad661ac11">More...</a><br/></td></tr>
<tr class="separator:gaf84f3f15bf6917acdc5b5a4ad661ac11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaaa818a1da51059bd979f0e768ebcc7c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaaaa818a1da51059bd979f0e768ebcc7c">SCTLR_I_Pos</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:gaaaa818a1da51059bd979f0e768ebcc7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: I Position.  <a href="group__CMSIS__SCTLR__BITS.html#gaaaa818a1da51059bd979f0e768ebcc7c">More...</a><br/></td></tr>
<tr class="separator:gaaaa818a1da51059bd979f0e768ebcc7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3cc0744fb07127e3c0f18cba9d51666"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gab3cc0744fb07127e3c0f18cba9d51666">SCTLR_I_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_I_Pos)</td></tr>
<tr class="memdesc:gab3cc0744fb07127e3c0f18cba9d51666"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: I Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gab3cc0744fb07127e3c0f18cba9d51666">More...</a><br/></td></tr>
<tr class="separator:gab3cc0744fb07127e3c0f18cba9d51666"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa0eade648c9a34de891af0e6f47857dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaa0eade648c9a34de891af0e6f47857dd">SCTLR_Z_Pos</a>&#160;&#160;&#160;11U</td></tr>
<tr class="memdesc:gaa0eade648c9a34de891af0e6f47857dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: Z Position.  <a href="group__CMSIS__SCTLR__BITS.html#gaa0eade648c9a34de891af0e6f47857dd">More...</a><br/></td></tr>
<tr class="separator:gaa0eade648c9a34de891af0e6f47857dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga12a05acdcb8db6e99970f26206d3067c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga12a05acdcb8db6e99970f26206d3067c">SCTLR_Z_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_Z_Pos)</td></tr>
<tr class="memdesc:ga12a05acdcb8db6e99970f26206d3067c"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: Z Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga12a05acdcb8db6e99970f26206d3067c">More...</a><br/></td></tr>
<tr class="separator:ga12a05acdcb8db6e99970f26206d3067c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3290be0882c1493bca9a0db6b4d0bff8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga3290be0882c1493bca9a0db6b4d0bff8">SCTLR_SW_Pos</a>&#160;&#160;&#160;10U</td></tr>
<tr class="memdesc:ga3290be0882c1493bca9a0db6b4d0bff8"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: SW Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga3290be0882c1493bca9a0db6b4d0bff8">More...</a><br/></td></tr>
<tr class="separator:ga3290be0882c1493bca9a0db6b4d0bff8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae4074aefcf01786fe199c82e273271b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gae4074aefcf01786fe199c82e273271b8">SCTLR_SW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_SW_Pos)</td></tr>
<tr class="memdesc:gae4074aefcf01786fe199c82e273271b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: SW Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gae4074aefcf01786fe199c82e273271b8">More...</a><br/></td></tr>
<tr class="separator:gae4074aefcf01786fe199c82e273271b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f185efbe1a9eb5738b2573f076a0859"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga5f185efbe1a9eb5738b2573f076a0859">SCTLR_B_Pos</a>&#160;&#160;&#160;7U</td></tr>
<tr class="memdesc:ga5f185efbe1a9eb5738b2573f076a0859"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: B Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga5f185efbe1a9eb5738b2573f076a0859">More...</a><br/></td></tr>
<tr class="separator:ga5f185efbe1a9eb5738b2573f076a0859"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4853d6f9ccbf919fcdadb0b2a5913cc6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga4853d6f9ccbf919fcdadb0b2a5913cc6">SCTLR_B_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_B_Pos)</td></tr>
<tr class="memdesc:ga4853d6f9ccbf919fcdadb0b2a5913cc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: B Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga4853d6f9ccbf919fcdadb0b2a5913cc6">More...</a><br/></td></tr>
<tr class="separator:ga4853d6f9ccbf919fcdadb0b2a5913cc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gace284f69e1a810957665adf0cb2e4b2b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gace284f69e1a810957665adf0cb2e4b2b">SCTLR_CP15BEN_Pos</a>&#160;&#160;&#160;5U</td></tr>
<tr class="memdesc:gace284f69e1a810957665adf0cb2e4b2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: CP15BEN Position.  <a href="group__CMSIS__SCTLR__BITS.html#gace284f69e1a810957665adf0cb2e4b2b">More...</a><br/></td></tr>
<tr class="separator:gace284f69e1a810957665adf0cb2e4b2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5541a6a63db4d4d233b8f57b1d46fbac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga5541a6a63db4d4d233b8f57b1d46fbac">SCTLR_CP15BEN_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_CP15BEN_Pos)</td></tr>
<tr class="memdesc:ga5541a6a63db4d4d233b8f57b1d46fbac"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: CP15BEN Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga5541a6a63db4d4d233b8f57b1d46fbac">More...</a><br/></td></tr>
<tr class="separator:ga5541a6a63db4d4d233b8f57b1d46fbac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a0394c5147b8212767087e3421deffa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga8a0394c5147b8212767087e3421deffa">SCTLR_C_Pos</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga8a0394c5147b8212767087e3421deffa"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: C Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga8a0394c5147b8212767087e3421deffa">More...</a><br/></td></tr>
<tr class="separator:ga8a0394c5147b8212767087e3421deffa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2be72788d984153ded81711e20fd2d33"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga2be72788d984153ded81711e20fd2d33">SCTLR_C_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_C_Pos)</td></tr>
<tr class="memdesc:ga2be72788d984153ded81711e20fd2d33"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: C Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga2be72788d984153ded81711e20fd2d33">More...</a><br/></td></tr>
<tr class="separator:ga2be72788d984153ded81711e20fd2d33"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0d667a307e974515ebc15b5249f34146"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga0d667a307e974515ebc15b5249f34146">SCTLR_A_Pos</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga0d667a307e974515ebc15b5249f34146"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: A Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga0d667a307e974515ebc15b5249f34146">More...</a><br/></td></tr>
<tr class="separator:ga0d667a307e974515ebc15b5249f34146"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga678c919832272745678213e55211e741"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga678c919832272745678213e55211e741">SCTLR_A_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_A_Pos)</td></tr>
<tr class="memdesc:ga678c919832272745678213e55211e741"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: A Mask.  <a href="group__CMSIS__SCTLR__BITS.html#ga678c919832272745678213e55211e741">More...</a><br/></td></tr>
<tr class="separator:ga678c919832272745678213e55211e741"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88e34078fa8cf719aab6f53f138c9810"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#ga88e34078fa8cf719aab6f53f138c9810">SCTLR_M_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga88e34078fa8cf719aab6f53f138c9810"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: M Position.  <a href="group__CMSIS__SCTLR__BITS.html#ga88e34078fa8cf719aab6f53f138c9810">More...</a><br/></td></tr>
<tr class="separator:ga88e34078fa8cf719aab6f53f138c9810"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf460824cdbf549bd914aa79762572e8e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html#gaf460824cdbf549bd914aa79762572e8e">SCTLR_M_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; SCTLR_M_Pos)</td></tr>
<tr class="memdesc:gaf460824cdbf549bd914aa79762572e8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCTLR: M Mask.  <a href="group__CMSIS__SCTLR__BITS.html#gaf460824cdbf549bd914aa79762572e8e">More...</a><br/></td></tr>
<tr class="separator:gaf460824cdbf549bd914aa79762572e8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5468e93550ce28af7114cbc1e19474c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0">ACTLR_DDI_Pos</a>&#160;&#160;&#160;28U</td></tr>
<tr class="memdesc:ga5468e93550ce28af7114cbc1e19474c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DDI Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0">More...</a><br/></td></tr>
<tr class="separator:ga5468e93550ce28af7114cbc1e19474c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeee8e0fc7b28f2a405b234e7d2c7486e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaeee8e0fc7b28f2a405b234e7d2c7486e">ACTLR_DDI_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_DDI_Pos)</td></tr>
<tr class="memdesc:gaeee8e0fc7b28f2a405b234e7d2c7486e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DDI Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gaeee8e0fc7b28f2a405b234e7d2c7486e">More...</a><br/></td></tr>
<tr class="separator:gaeee8e0fc7b28f2a405b234e7d2c7486e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0367a8413c0a37d6c1de7b90f3a56aee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee">ACTLR_DBDI_Pos</a>&#160;&#160;&#160;28U</td></tr>
<tr class="memdesc:ga0367a8413c0a37d6c1de7b90f3a56aee"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DBDI Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee">More...</a><br/></td></tr>
<tr class="separator:ga0367a8413c0a37d6c1de7b90f3a56aee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a3d58754927731758c53bd945ac35fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0a3d58754927731758c53bd945ac35fe">ACTLR_DBDI_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_DBDI_Pos)</td></tr>
<tr class="memdesc:ga0a3d58754927731758c53bd945ac35fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DBDI Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga0a3d58754927731758c53bd945ac35fe">More...</a><br/></td></tr>
<tr class="separator:ga0a3d58754927731758c53bd945ac35fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c81a1e1522400322f215c52ca80d47d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8c81a1e1522400322f215c52ca80d47d">ACTLR_BTDIS_Pos</a>&#160;&#160;&#160;18U</td></tr>
<tr class="memdesc:ga8c81a1e1522400322f215c52ca80d47d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: BTDIS Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga8c81a1e1522400322f215c52ca80d47d">More...</a><br/></td></tr>
<tr class="separator:ga8c81a1e1522400322f215c52ca80d47d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad48e0a1c1e59e6721547b45f37baa48b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad48e0a1c1e59e6721547b45f37baa48b">ACTLR_BTDIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_BTDIS_Pos)</td></tr>
<tr class="memdesc:gad48e0a1c1e59e6721547b45f37baa48b"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: BTDIS Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gad48e0a1c1e59e6721547b45f37baa48b">More...</a><br/></td></tr>
<tr class="separator:gad48e0a1c1e59e6721547b45f37baa48b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4412a55ce52db3c5a4f035fcd0e350c6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6">ACTLR_RSDIS_Pos</a>&#160;&#160;&#160;17U</td></tr>
<tr class="memdesc:ga4412a55ce52db3c5a4f035fcd0e350c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: RSDIS Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6">More...</a><br/></td></tr>
<tr class="separator:ga4412a55ce52db3c5a4f035fcd0e350c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8487babc3514e2bb8f3d524e5f80d95f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8487babc3514e2bb8f3d524e5f80d95f">ACTLR_RSDIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_RSDIS_Pos)</td></tr>
<tr class="memdesc:ga8487babc3514e2bb8f3d524e5f80d95f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: RSDIS Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga8487babc3514e2bb8f3d524e5f80d95f">More...</a><br/></td></tr>
<tr class="separator:ga8487babc3514e2bb8f3d524e5f80d95f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga120f5d653af52bd711c27c2495ce78f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga120f5d653af52bd711c27c2495ce78f6">ACTLR_BP_Pos</a>&#160;&#160;&#160;15U</td></tr>
<tr class="memdesc:ga120f5d653af52bd711c27c2495ce78f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: BP Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga120f5d653af52bd711c27c2495ce78f6">More...</a><br/></td></tr>
<tr class="separator:ga120f5d653af52bd711c27c2495ce78f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga677211818d8a2c7b118115361fbef2e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga677211818d8a2c7b118115361fbef2e7">ACTLR_BP_Msk</a>&#160;&#160;&#160;(3UL &lt;&lt; ACTLR_BP_Pos)</td></tr>
<tr class="memdesc:ga677211818d8a2c7b118115361fbef2e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: BP Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga677211818d8a2c7b118115361fbef2e7">More...</a><br/></td></tr>
<tr class="separator:ga677211818d8a2c7b118115361fbef2e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa9fe7651aa9bb48eea4f5301c69ee54d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d">ACTLR_DDVM_Pos</a>&#160;&#160;&#160;15U</td></tr>
<tr class="memdesc:gaa9fe7651aa9bb48eea4f5301c69ee54d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DDVM Position.  <a href="group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d">More...</a><br/></td></tr>
<tr class="separator:gaa9fe7651aa9bb48eea4f5301c69ee54d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4565f2632e5c4be5e1d3eb90fa6f2ac6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">ACTLR_DDVM_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_DDVM_Pos)</td></tr>
<tr class="memdesc:ga4565f2632e5c4be5e1d3eb90fa6f2ac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DDVM Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">More...</a><br/></td></tr>
<tr class="separator:ga4565f2632e5c4be5e1d3eb90fa6f2ac6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga546f1f2bbf7344bad6522205257f17ae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae">ACTLR_L1PCTL_Pos</a>&#160;&#160;&#160;13U</td></tr>
<tr class="memdesc:ga546f1f2bbf7344bad6522205257f17ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PCTL Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae">More...</a><br/></td></tr>
<tr class="separator:ga546f1f2bbf7344bad6522205257f17ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad701fa3ff69b89ba185b7482e81cb6fd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad701fa3ff69b89ba185b7482e81cb6fd">ACTLR_L1PCTL_Msk</a>&#160;&#160;&#160;(3UL &lt;&lt; ACTLR_L1PCTL_Pos)</td></tr>
<tr class="memdesc:gad701fa3ff69b89ba185b7482e81cb6fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PCTL Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gad701fa3ff69b89ba185b7482e81cb6fd">More...</a><br/></td></tr>
<tr class="separator:gad701fa3ff69b89ba185b7482e81cb6fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7a424f7f8c4f46592ce8f47f4bced44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44">ACTLR_RADIS_Pos</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:gaf7a424f7f8c4f46592ce8f47f4bced44"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: RADIS Position.  <a href="group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44">More...</a><br/></td></tr>
<tr class="separator:gaf7a424f7f8c4f46592ce8f47f4bced44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6aea849e5320c0e93321d5d8b0c117c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6aea849e5320c0e93321d5d8b0c117c">ACTLR_RADIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_RADIS_Pos)</td></tr>
<tr class="memdesc:gac6aea849e5320c0e93321d5d8b0c117c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: RADIS Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gac6aea849e5320c0e93321d5d8b0c117c">More...</a><br/></td></tr>
<tr class="separator:gac6aea849e5320c0e93321d5d8b0c117c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8b306b854ecd78110cf944d414644a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1">ACTLR_L1RADIS_Pos</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:gaf8b306b854ecd78110cf944d414644a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1RADIS Position.  <a href="group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1">More...</a><br/></td></tr>
<tr class="separator:gaf8b306b854ecd78110cf944d414644a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6aafd83ca6c02f705def8edc8c064c04"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga6aafd83ca6c02f705def8edc8c064c04">ACTLR_L1RADIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_L1RADIS_Pos)</td></tr>
<tr class="memdesc:ga6aafd83ca6c02f705def8edc8c064c04"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1RADIS Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga6aafd83ca6c02f705def8edc8c064c04">More...</a><br/></td></tr>
<tr class="separator:ga6aafd83ca6c02f705def8edc8c064c04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>&#160;&#160;&#160;11U</td></tr>
<tr class="memdesc:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DWBST Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">More...</a><br/></td></tr>
<tr class="separator:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e">ACTLR_DWBST_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_DWBST_Pos)</td></tr>
<tr class="memdesc:gab948ab9af88a9357e2e383d948e9dc7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DWBST Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e">More...</a><br/></td></tr>
<tr class="separator:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>&#160;&#160;&#160;11U</td></tr>
<tr class="memdesc:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L2RADIS Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">More...</a><br/></td></tr>
<tr class="separator:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad84b20f4f5d1979bb000a14a582cad12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12">ACTLR_L2RADIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_L2RADIS_Pos)</td></tr>
<tr class="memdesc:gad84b20f4f5d1979bb000a14a582cad12"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L2RADIS Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12">More...</a><br/></td></tr>
<tr class="separator:gad84b20f4f5d1979bb000a14a582cad12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>&#160;&#160;&#160;10U</td></tr>
<tr class="memdesc:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DODMBS Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">More...</a><br/></td></tr>
<tr class="separator:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88a85e6310334edb190a6e9298ae98b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7">ACTLR_DODMBS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_DODMBS_Pos)</td></tr>
<tr class="memdesc:ga88a85e6310334edb190a6e9298ae98b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DODMBS Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7">More...</a><br/></td></tr>
<tr class="separator:ga88a85e6310334edb190a6e9298ae98b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>&#160;&#160;&#160;9U</td></tr>
<tr class="memdesc:ga8300a65b41aa3f5c69c7cc713c847749"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: PARITY Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">More...</a><br/></td></tr>
<tr class="separator:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb">ACTLR_PARITY_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_PARITY_Pos)</td></tr>
<tr class="memdesc:gadec8e5d68791dc4749bf3f075a3559fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: PARITY Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb">More...</a><br/></td></tr>
<tr class="separator:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga633ee6b129f8668593687ab8537aeb7f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>&#160;&#160;&#160;8U</td></tr>
<tr class="memdesc:ga633ee6b129f8668593687ab8537aeb7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: AOW Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">More...</a><br/></td></tr>
<tr class="separator:ga633ee6b129f8668593687ab8537aeb7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5ca6754c31f90c7e5d1822dddfb4135c">ACTLR_AOW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_AOW_Pos)</td></tr>
<tr class="memdesc:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: AOW Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga5ca6754c31f90c7e5d1822dddfb4135c">More...</a><br/></td></tr>
<tr class="separator:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17dcfbcdf5db82900354db5440699701"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>&#160;&#160;&#160;7U</td></tr>
<tr class="memdesc:ga17dcfbcdf5db82900354db5440699701"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: EXCL Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">More...</a><br/></td></tr>
<tr class="separator:ga17dcfbcdf5db82900354db5440699701"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55">ACTLR_EXCL_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_EXCL_Pos)</td></tr>
<tr class="memdesc:ga8b704419a7ed130ecbee00de9fd72d55"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: EXCL Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55">More...</a><br/></td></tr>
<tr class="separator:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>&#160;&#160;&#160;6U</td></tr>
<tr class="memdesc:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: SMP Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">More...</a><br/></td></tr>
<tr class="separator:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8">ACTLR_SMP_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_SMP_Pos)</td></tr>
<tr class="memdesc:gac6dcc315f6c4527434b9b0e4106771d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: SMP Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8">More...</a><br/></td></tr>
<tr class="separator:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga104112fe1d88dde49635e9b0f9530306"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:ga104112fe1d88dde49635e9b0f9530306"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: WFLZM Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">More...</a><br/></td></tr>
<tr class="separator:ga104112fe1d88dde49635e9b0f9530306"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5a89cb553773b10e86a9c826f11179f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f">ACTLR_WFLZM_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_WFLZM_Pos)</td></tr>
<tr class="memdesc:gae5a89cb553773b10e86a9c826f11179f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: WFLZM Mask.  <a href="group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f">More...</a><br/></td></tr>
<tr class="separator:gae5a89cb553773b10e86a9c826f11179f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PE Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">More...</a><br/></td></tr>
<tr class="separator:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga969c20495fe3e50e8c2a73454688a674"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674">ACTLR_L1PE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_L1PE_Pos)</td></tr>
<tr class="memdesc:ga969c20495fe3e50e8c2a73454688a674"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PE Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674">More...</a><br/></td></tr>
<tr class="separator:ga969c20495fe3e50e8c2a73454688a674"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga89b1a661668534177bc9679149a692ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga89b1a661668534177bc9679149a692ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: FW Position.  <a href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">More...</a><br/></td></tr>
<tr class="separator:ga89b1a661668534177bc9679149a692ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">ACTLR_FW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ACTLR_FW_Pos)</td></tr>
<tr class="memdesc:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: FW Mask.  <a href="group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">More...</a><br/></td></tr>
<tr class="separator:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3acd342ab1e88bd4ad73f5670e7af163"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga3acd342ab1e88bd4ad73f5670e7af163">CPACR_ASEDIS_Pos</a>&#160;&#160;&#160;31U</td></tr>
<tr class="memdesc:ga3acd342ab1e88bd4ad73f5670e7af163"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: ASEDIS Position.  <a href="group__CMSIS__CPACR__BITS.html#ga3acd342ab1e88bd4ad73f5670e7af163">More...</a><br/></td></tr>
<tr class="separator:ga3acd342ab1e88bd4ad73f5670e7af163"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46d28804bfa370b0dd4ac520a7a67609"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga46d28804bfa370b0dd4ac520a7a67609">CPACR_ASEDIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPACR_ASEDIS_Pos)</td></tr>
<tr class="memdesc:ga46d28804bfa370b0dd4ac520a7a67609"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: ASEDIS Mask.  <a href="group__CMSIS__CPACR__BITS.html#ga46d28804bfa370b0dd4ac520a7a67609">More...</a><br/></td></tr>
<tr class="separator:ga46d28804bfa370b0dd4ac520a7a67609"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6df0c4e805105285e63b0f0e992bd416"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">CPACR_D32DIS_Pos</a>&#160;&#160;&#160;30U</td></tr>
<tr class="memdesc:ga6df0c4e805105285e63b0f0e992bd416"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Position.  <a href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">More...</a><br/></td></tr>
<tr class="separator:ga6df0c4e805105285e63b0f0e992bd416"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96266eb6bf35c3c3f22718bd06b12d79"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga96266eb6bf35c3c3f22718bd06b12d79">CPACR_D32DIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPACR_D32DIS_Pos)</td></tr>
<tr class="memdesc:ga96266eb6bf35c3c3f22718bd06b12d79"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Mask.  <a href="group__CMSIS__CPACR__BITS.html#ga96266eb6bf35c3c3f22718bd06b12d79">More...</a><br/></td></tr>
<tr class="separator:ga96266eb6bf35c3c3f22718bd06b12d79"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6866c97020fdba42f7c287433c58d77c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga6866c97020fdba42f7c287433c58d77c">CPACR_TRCDIS_Pos</a>&#160;&#160;&#160;28U</td></tr>
<tr class="memdesc:ga6866c97020fdba42f7c287433c58d77c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Position.  <a href="group__CMSIS__CPACR__BITS.html#ga6866c97020fdba42f7c287433c58d77c">More...</a><br/></td></tr>
<tr class="separator:ga6866c97020fdba42f7c287433c58d77c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5d6ec83339e755bd3e7eacb914edf37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#gab5d6ec83339e755bd3e7eacb914edf37">CPACR_TRCDIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; CPACR_D32DIS_Pos)</td></tr>
<tr class="memdesc:gab5d6ec83339e755bd3e7eacb914edf37"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Mask.  <a href="group__CMSIS__CPACR__BITS.html#gab5d6ec83339e755bd3e7eacb914edf37">More...</a><br/></td></tr>
<tr class="separator:gab5d6ec83339e755bd3e7eacb914edf37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77dc035e6d16dee8f5cf53b36b86cfaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga77dc035e6d16dee8f5cf53b36b86cfaf">CPACR_CP_Pos_</a>(n)&#160;&#160;&#160;(n*2U)</td></tr>
<tr class="memdesc:ga77dc035e6d16dee8f5cf53b36b86cfaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: CPn Position.  <a href="group__CMSIS__CPACR__BITS.html#ga77dc035e6d16dee8f5cf53b36b86cfaf">More...</a><br/></td></tr>
<tr class="separator:ga77dc035e6d16dee8f5cf53b36b86cfaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c87723442baa681a80de8f644eda1a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga7c87723442baa681a80de8f644eda1a2">CPACR_CP_Msk_</a>(n)&#160;&#160;&#160;(3UL &lt;&lt; CPACR_CP_Pos_(n))</td></tr>
<tr class="memdesc:ga7c87723442baa681a80de8f644eda1a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: CPn Mask.  <a href="group__CMSIS__CPACR__BITS.html#ga7c87723442baa681a80de8f644eda1a2">More...</a><br/></td></tr>
<tr class="separator:ga7c87723442baa681a80de8f644eda1a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd03f590b34b809438eaa3df4af2e7db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__CP.html#gabd03f590b34b809438eaa3df4af2e7db">CPACR_CP_NA</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:gabd03f590b34b809438eaa3df4af2e7db"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR CPn field: Access denied.  <a href="group__CMSIS__CPACR__CP.html#gabd03f590b34b809438eaa3df4af2e7db">More...</a><br/></td></tr>
<tr class="separator:gabd03f590b34b809438eaa3df4af2e7db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8602342c0bad80f3a36d3bdee7418a46"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__CP.html#ga8602342c0bad80f3a36d3bdee7418a46">CPACR_CP_PL1</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga8602342c0bad80f3a36d3bdee7418a46"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR CPn field: Accessible from PL1 only.  <a href="group__CMSIS__CPACR__CP.html#ga8602342c0bad80f3a36d3bdee7418a46">More...</a><br/></td></tr>
<tr class="separator:ga8602342c0bad80f3a36d3bdee7418a46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeaa29f06a74fadc7245d6bd183bad11b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__CP.html#gaeaa29f06a74fadc7245d6bd183bad11b">CPACR_CP_FA</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:gaeaa29f06a74fadc7245d6bd183bad11b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR CPn field: Full access.  <a href="group__CMSIS__CPACR__CP.html#gaeaa29f06a74fadc7245d6bd183bad11b">More...</a><br/></td></tr>
<tr class="separator:gaeaa29f06a74fadc7245d6bd183bad11b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1c7d8f30e77bd1fe395d6e9a5a63a3e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#gac1c7d8f30e77bd1fe395d6e9a5a63a3e">DFSR_CM_Pos</a>&#160;&#160;&#160;13U</td></tr>
<tr class="memdesc:gac1c7d8f30e77bd1fe395d6e9a5a63a3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: CM Position.  <a href="group__CMSIS__DFSR__BITS.html#gac1c7d8f30e77bd1fe395d6e9a5a63a3e">More...</a><br/></td></tr>
<tr class="separator:gac1c7d8f30e77bd1fe395d6e9a5a63a3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91cf285dc43beda62ae72f043e83238c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga91cf285dc43beda62ae72f043e83238c">DFSR_CM_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; DFSR_CM_Pos)</td></tr>
<tr class="memdesc:ga91cf285dc43beda62ae72f043e83238c"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: CM Mask.  <a href="group__CMSIS__DFSR__BITS.html#ga91cf285dc43beda62ae72f043e83238c">More...</a><br/></td></tr>
<tr class="separator:ga91cf285dc43beda62ae72f043e83238c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8cc8dcb1b3a971a13b0575bf9083acf5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga8cc8dcb1b3a971a13b0575bf9083acf5">DFSR_Ext_Pos</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:ga8cc8dcb1b3a971a13b0575bf9083acf5"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: Ext Position.  <a href="group__CMSIS__DFSR__BITS.html#ga8cc8dcb1b3a971a13b0575bf9083acf5">More...</a><br/></td></tr>
<tr class="separator:ga8cc8dcb1b3a971a13b0575bf9083acf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3a97b4eb87f45df8ae539e59592f21b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#gad3a97b4eb87f45df8ae539e59592f21b">DFSR_Ext_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; DFSR_Ext_Pos)</td></tr>
<tr class="memdesc:gad3a97b4eb87f45df8ae539e59592f21b"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: Ext Mask.  <a href="group__CMSIS__DFSR__BITS.html#gad3a97b4eb87f45df8ae539e59592f21b">More...</a><br/></td></tr>
<tr class="separator:gad3a97b4eb87f45df8ae539e59592f21b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga410420633e9ba47cdd1ae2d3df146866"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga410420633e9ba47cdd1ae2d3df146866">DFSR_WnR_Pos</a>&#160;&#160;&#160;11U</td></tr>
<tr class="memdesc:ga410420633e9ba47cdd1ae2d3df146866"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: WnR Position.  <a href="group__CMSIS__DFSR__BITS.html#ga410420633e9ba47cdd1ae2d3df146866">More...</a><br/></td></tr>
<tr class="separator:ga410420633e9ba47cdd1ae2d3df146866"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfbf482895e7620fe6727b54378c0f2a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#gabfbf482895e7620fe6727b54378c0f2a">DFSR_WnR_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; DFSR_WnR_Pos)</td></tr>
<tr class="memdesc:gabfbf482895e7620fe6727b54378c0f2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: WnR Mask.  <a href="group__CMSIS__DFSR__BITS.html#gabfbf482895e7620fe6727b54378c0f2a">More...</a><br/></td></tr>
<tr class="separator:gabfbf482895e7620fe6727b54378c0f2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3faee10970931cadf7ff16069ce65a1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga3faee10970931cadf7ff16069ce65a1a">DFSR_FS1_Pos</a>&#160;&#160;&#160;10U</td></tr>
<tr class="memdesc:ga3faee10970931cadf7ff16069ce65a1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: FS1 Position.  <a href="group__CMSIS__DFSR__BITS.html#ga3faee10970931cadf7ff16069ce65a1a">More...</a><br/></td></tr>
<tr class="separator:ga3faee10970931cadf7ff16069ce65a1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6540a3ca5b2dcf8f81bb37fbdbe9d746"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga6540a3ca5b2dcf8f81bb37fbdbe9d746">DFSR_FS1_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; DFSR_FS1_Pos)</td></tr>
<tr class="memdesc:ga6540a3ca5b2dcf8f81bb37fbdbe9d746"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: FS1 Mask.  <a href="group__CMSIS__DFSR__BITS.html#ga6540a3ca5b2dcf8f81bb37fbdbe9d746">More...</a><br/></td></tr>
<tr class="separator:ga6540a3ca5b2dcf8f81bb37fbdbe9d746"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga10f7b48c4f128c9be07c377bb60cfa7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga10f7b48c4f128c9be07c377bb60cfa7a">DFSR_LPAE_Pos</a>&#160;&#160;&#160;9U</td></tr>
<tr class="memdesc:ga10f7b48c4f128c9be07c377bb60cfa7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: LPAE Position.  <a href="group__CMSIS__DFSR__BITS.html#ga10f7b48c4f128c9be07c377bb60cfa7a">More...</a><br/></td></tr>
<tr class="separator:ga10f7b48c4f128c9be07c377bb60cfa7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga104bfa1e333340616fdbdc804948276f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga104bfa1e333340616fdbdc804948276f">DFSR_LPAE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; DFSR_LPAE_Pos)</td></tr>
<tr class="memdesc:ga104bfa1e333340616fdbdc804948276f"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: LPAE Mask.  <a href="group__CMSIS__DFSR__BITS.html#ga104bfa1e333340616fdbdc804948276f">More...</a><br/></td></tr>
<tr class="separator:ga104bfa1e333340616fdbdc804948276f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5a7afc43963dbc429792fb5a1569e15"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#gac5a7afc43963dbc429792fb5a1569e15">DFSR_Domain_Pos</a>&#160;&#160;&#160;4U</td></tr>
<tr class="memdesc:gac5a7afc43963dbc429792fb5a1569e15"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: Domain Position.  <a href="group__CMSIS__DFSR__BITS.html#gac5a7afc43963dbc429792fb5a1569e15">More...</a><br/></td></tr>
<tr class="separator:gac5a7afc43963dbc429792fb5a1569e15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga59949776e069a5af7231ef63156f17cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga59949776e069a5af7231ef63156f17cf">DFSR_Domain_Msk</a>&#160;&#160;&#160;(0xFUL &lt;&lt; DFSR_Domain_Pos)</td></tr>
<tr class="memdesc:ga59949776e069a5af7231ef63156f17cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: Domain Mask.  <a href="group__CMSIS__DFSR__BITS.html#ga59949776e069a5af7231ef63156f17cf">More...</a><br/></td></tr>
<tr class="separator:ga59949776e069a5af7231ef63156f17cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5d9bc62e71693bd9dc2a84bb4c82082"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#gae5d9bc62e71693bd9dc2a84bb4c82082">DFSR_FS0_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:gae5d9bc62e71693bd9dc2a84bb4c82082"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: FS0 Position.  <a href="group__CMSIS__DFSR__BITS.html#gae5d9bc62e71693bd9dc2a84bb4c82082">More...</a><br/></td></tr>
<tr class="separator:gae5d9bc62e71693bd9dc2a84bb4c82082"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga23b688e81c0378b5cd75acb53896bb5e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga23b688e81c0378b5cd75acb53896bb5e">DFSR_FS0_Msk</a>&#160;&#160;&#160;(0xFUL &lt;&lt; DFSR_FS0_Pos)</td></tr>
<tr class="memdesc:ga23b688e81c0378b5cd75acb53896bb5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: FS0 Mask.  <a href="group__CMSIS__DFSR__BITS.html#ga23b688e81c0378b5cd75acb53896bb5e">More...</a><br/></td></tr>
<tr class="separator:ga23b688e81c0378b5cd75acb53896bb5e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacb6fae1908b12c4900e2cdcc320c6c11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#gacb6fae1908b12c4900e2cdcc320c6c11">DFSR_STATUS_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:gacb6fae1908b12c4900e2cdcc320c6c11"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: STATUS Position.  <a href="group__CMSIS__DFSR__BITS.html#gacb6fae1908b12c4900e2cdcc320c6c11">More...</a><br/></td></tr>
<tr class="separator:gacb6fae1908b12c4900e2cdcc320c6c11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7541052737038d737fd9fe00b9815140"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DFSR__BITS.html#ga7541052737038d737fd9fe00b9815140">DFSR_STATUS_Msk</a>&#160;&#160;&#160;(0x3FUL &lt;&lt; DFSR_STATUS_Pos)</td></tr>
<tr class="memdesc:ga7541052737038d737fd9fe00b9815140"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: STATUS Mask.  <a href="group__CMSIS__DFSR__BITS.html#ga7541052737038d737fd9fe00b9815140">More...</a><br/></td></tr>
<tr class="separator:ga7541052737038d737fd9fe00b9815140"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafb3d593ec56834b6a265744efd6340a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#gafb3d593ec56834b6a265744efd6340a8">IFSR_ExT_Pos</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:gafb3d593ec56834b6a265744efd6340a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: ExT Position.  <a href="group__CMSIS__IFSR__BITS.html#gafb3d593ec56834b6a265744efd6340a8">More...</a><br/></td></tr>
<tr class="separator:gafb3d593ec56834b6a265744efd6340a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0083a1d82b370a7e5208e39267bda22"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#gab0083a1d82b370a7e5208e39267bda22">IFSR_ExT_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; IFSR_ExT_Pos)</td></tr>
<tr class="memdesc:gab0083a1d82b370a7e5208e39267bda22"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: ExT Mask.  <a href="group__CMSIS__IFSR__BITS.html#gab0083a1d82b370a7e5208e39267bda22">More...</a><br/></td></tr>
<tr class="separator:gab0083a1d82b370a7e5208e39267bda22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ecf4e123cfee3f0a19898a822fc0f62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#ga9ecf4e123cfee3f0a19898a822fc0f62">IFSR_FS1_Pos</a>&#160;&#160;&#160;10U</td></tr>
<tr class="memdesc:ga9ecf4e123cfee3f0a19898a822fc0f62"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: FS1 Position.  <a href="group__CMSIS__IFSR__BITS.html#ga9ecf4e123cfee3f0a19898a822fc0f62">More...</a><br/></td></tr>
<tr class="separator:ga9ecf4e123cfee3f0a19898a822fc0f62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6fc93a02fbd1c968c70786a84428fca6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#ga6fc93a02fbd1c968c70786a84428fca6">IFSR_FS1_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; IFSR_FS1_Pos)</td></tr>
<tr class="memdesc:ga6fc93a02fbd1c968c70786a84428fca6"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: FS1 Mask.  <a href="group__CMSIS__IFSR__BITS.html#ga6fc93a02fbd1c968c70786a84428fca6">More...</a><br/></td></tr>
<tr class="separator:ga6fc93a02fbd1c968c70786a84428fca6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadfd49185eeb102fc69e0a0d28fd2c4a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#gadfd49185eeb102fc69e0a0d28fd2c4a4">IFSR_LPAE_Pos</a>&#160;&#160;&#160;9U</td></tr>
<tr class="memdesc:gadfd49185eeb102fc69e0a0d28fd2c4a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: LPAE Position.  <a href="group__CMSIS__IFSR__BITS.html#gadfd49185eeb102fc69e0a0d28fd2c4a4">More...</a><br/></td></tr>
<tr class="separator:gadfd49185eeb102fc69e0a0d28fd2c4a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20639ca32a866d7b021e455b7a5d24c6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#ga20639ca32a866d7b021e455b7a5d24c6">IFSR_LPAE_Msk</a>&#160;&#160;&#160;(0x1UL &lt;&lt; IFSR_LPAE_Pos)</td></tr>
<tr class="memdesc:ga20639ca32a866d7b021e455b7a5d24c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: LPAE Mask.  <a href="group__CMSIS__IFSR__BITS.html#ga20639ca32a866d7b021e455b7a5d24c6">More...</a><br/></td></tr>
<tr class="separator:ga20639ca32a866d7b021e455b7a5d24c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga487c29da2f2d648f149c4346f3093f72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#ga487c29da2f2d648f149c4346f3093f72">IFSR_FS0_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga487c29da2f2d648f149c4346f3093f72"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: FS0 Position.  <a href="group__CMSIS__IFSR__BITS.html#ga487c29da2f2d648f149c4346f3093f72">More...</a><br/></td></tr>
<tr class="separator:ga487c29da2f2d648f149c4346f3093f72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa17676ff0276b0fe93f92010fe35f6b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#gaa17676ff0276b0fe93f92010fe35f6b8">IFSR_FS0_Msk</a>&#160;&#160;&#160;(0xFUL &lt;&lt; IFSR_FS0_Pos)</td></tr>
<tr class="memdesc:gaa17676ff0276b0fe93f92010fe35f6b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: FS0 Mask.  <a href="group__CMSIS__IFSR__BITS.html#gaa17676ff0276b0fe93f92010fe35f6b8">More...</a><br/></td></tr>
<tr class="separator:gaa17676ff0276b0fe93f92010fe35f6b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64ec6d573ec1efe1d6c36100ad1cd09d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#ga64ec6d573ec1efe1d6c36100ad1cd09d">IFSR_STATUS_Pos</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga64ec6d573ec1efe1d6c36100ad1cd09d"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: STATUS Position.  <a href="group__CMSIS__IFSR__BITS.html#ga64ec6d573ec1efe1d6c36100ad1cd09d">More...</a><br/></td></tr>
<tr class="separator:ga64ec6d573ec1efe1d6c36100ad1cd09d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf74c1045a32a2d4de7ea6f0dbcf0d1b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__IFSR__BITS.html#gaf74c1045a32a2d4de7ea6f0dbcf0d1b3">IFSR_STATUS_Msk</a>&#160;&#160;&#160;(0x3FUL &lt;&lt; IFSR_STATUS_Pos)</td></tr>
<tr class="memdesc:gaf74c1045a32a2d4de7ea6f0dbcf0d1b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">IFSR: STATUS Mask.  <a href="group__CMSIS__IFSR__BITS.html#gaf74c1045a32a2d4de7ea6f0dbcf0d1b3">More...</a><br/></td></tr>
<tr class="separator:gaf74c1045a32a2d4de7ea6f0dbcf0d1b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaecf0a2cb278bfd27e0da4ab8126d98af"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#gaecf0a2cb278bfd27e0da4ab8126d98af">ISR_A_Pos</a>&#160;&#160;&#160;13U</td></tr>
<tr class="memdesc:gaecf0a2cb278bfd27e0da4ab8126d98af"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: A Position.  <a href="group__CMSIS__ISR__BITS.html#gaecf0a2cb278bfd27e0da4ab8126d98af">More...</a><br/></td></tr>
<tr class="separator:gaecf0a2cb278bfd27e0da4ab8126d98af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c6d55d243da46ed7ca05c3941316c8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#ga8c6d55d243da46ed7ca05c3941316c8d">ISR_A_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ISR_A_Pos)</td></tr>
<tr class="memdesc:ga8c6d55d243da46ed7ca05c3941316c8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: A Mask.  <a href="group__CMSIS__ISR__BITS.html#ga8c6d55d243da46ed7ca05c3941316c8d">More...</a><br/></td></tr>
<tr class="separator:ga8c6d55d243da46ed7ca05c3941316c8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f51d4217c1394e52f5223a6cd382136"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#ga9f51d4217c1394e52f5223a6cd382136">ISR_I_Pos</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:ga9f51d4217c1394e52f5223a6cd382136"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: I Position.  <a href="group__CMSIS__ISR__BITS.html#ga9f51d4217c1394e52f5223a6cd382136">More...</a><br/></td></tr>
<tr class="separator:ga9f51d4217c1394e52f5223a6cd382136"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7b756c9a406d7dd0a86891656908e98c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#ga7b756c9a406d7dd0a86891656908e98c">ISR_I_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ISR_I_Pos)</td></tr>
<tr class="memdesc:ga7b756c9a406d7dd0a86891656908e98c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: I Mask.  <a href="group__CMSIS__ISR__BITS.html#ga7b756c9a406d7dd0a86891656908e98c">More...</a><br/></td></tr>
<tr class="separator:ga7b756c9a406d7dd0a86891656908e98c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8654422bb59e22fb7f1321eeef1b81d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#gad8654422bb59e22fb7f1321eeef1b81d">ISR_F_Pos</a>&#160;&#160;&#160;11U</td></tr>
<tr class="memdesc:gad8654422bb59e22fb7f1321eeef1b81d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: F Position.  <a href="group__CMSIS__ISR__BITS.html#gad8654422bb59e22fb7f1321eeef1b81d">More...</a><br/></td></tr>
<tr class="separator:gad8654422bb59e22fb7f1321eeef1b81d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2efaf413c81afab4265515160f6700c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#gac2efaf413c81afab4265515160f6700c">ISR_F_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ISR_F_Pos)</td></tr>
<tr class="memdesc:gac2efaf413c81afab4265515160f6700c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: F Mask.  <a href="group__CMSIS__ISR__BITS.html#gac2efaf413c81afab4265515160f6700c">More...</a><br/></td></tr>
<tr class="separator:gac2efaf413c81afab4265515160f6700c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2c014e929b74e6ded5e89a74903ce975"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DACR__BITS.html#ga2c014e929b74e6ded5e89a74903ce975">DACR_D_Pos_</a>(n)&#160;&#160;&#160;(2U*n)</td></tr>
<tr class="memdesc:ga2c014e929b74e6ded5e89a74903ce975"><td class="mdescLeft">&#160;</td><td class="mdescRight">DACR: Dn Position.  <a href="group__CMSIS__DACR__BITS.html#ga2c014e929b74e6ded5e89a74903ce975">More...</a><br/></td></tr>
<tr class="separator:ga2c014e929b74e6ded5e89a74903ce975"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga41b90c8a7338fbe5e5b06be083ba22fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DACR__BITS.html#ga41b90c8a7338fbe5e5b06be083ba22fe">DACR_D_Msk_</a>(n)&#160;&#160;&#160;(3UL &lt;&lt; DACR_D_Pos_(n))</td></tr>
<tr class="memdesc:ga41b90c8a7338fbe5e5b06be083ba22fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">DACR: Dn Mask.  <a href="group__CMSIS__DACR__BITS.html#ga41b90c8a7338fbe5e5b06be083ba22fe">More...</a><br/></td></tr>
<tr class="separator:ga41b90c8a7338fbe5e5b06be083ba22fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga281ebf97decb4ef4f7b1e5c4285c45ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DACR__Dn.html#ga281ebf97decb4ef4f7b1e5c4285c45ab">DACR_Dn_NOACCESS</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga281ebf97decb4ef4f7b1e5c4285c45ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">DACR Dn field: No access.  <a href="group__CMSIS__DACR__Dn.html#ga281ebf97decb4ef4f7b1e5c4285c45ab">More...</a><br/></td></tr>
<tr class="separator:ga281ebf97decb4ef4f7b1e5c4285c45ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac76e6128758cd64a9fa92487ec49441b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DACR__Dn.html#gac76e6128758cd64a9fa92487ec49441b">DACR_Dn_CLIENT</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:gac76e6128758cd64a9fa92487ec49441b"><td class="mdescLeft">&#160;</td><td class="mdescRight">DACR Dn field: Client.  <a href="group__CMSIS__DACR__Dn.html#gac76e6128758cd64a9fa92487ec49441b">More...</a><br/></td></tr>
<tr class="separator:gac76e6128758cd64a9fa92487ec49441b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabbf27724d67055138bf7abdb651e9732"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__DACR__Dn.html#gabbf27724d67055138bf7abdb651e9732">DACR_Dn_MANAGER</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:gabbf27724d67055138bf7abdb651e9732"><td class="mdescLeft">&#160;</td><td class="mdescRight">DACR Dn field: Manager.  <a href="group__CMSIS__DACR__Dn.html#gabbf27724d67055138bf7abdb651e9732">More...</a><br/></td></tr>
<tr class="separator:gabbf27724d67055138bf7abdb651e9732"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a286e3b913dbd236c7f48ea70c8821f4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>(field, value)&#160;&#160;&#160;(((uint32_t)(value) &lt;&lt; field ## _Pos) &amp; field ## _Msk)</td></tr>
<tr class="memdesc:a286e3b913dbd236c7f48ea70c8821f4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask and shift a bit field value for use in a register bit range.  <a href="#a286e3b913dbd236c7f48ea70c8821f4e">More...</a><br/></td></tr>
<tr class="separator:a286e3b913dbd236c7f48ea70c8821f4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a139b6e261c981f014f386927ca4a8444"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a139b6e261c981f014f386927ca4a8444">_FLD2VAL</a>(field, value)&#160;&#160;&#160;(((uint32_t)(value) &amp; field ## _Msk) &gt;&gt; field ## _Pos)</td></tr>
<tr class="memdesc:a139b6e261c981f014f386927ca4a8444"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask and shift a register value to extract a bit filed value.  <a href="#a139b6e261c981f014f386927ca4a8444">More...</a><br/></td></tr>
<tr class="separator:a139b6e261c981f014f386927ca4a8444"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b08fba5b9be921c8a971231f75f8764"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga3b08fba5b9be921c8a971231f75f8764">L2C_310</a>&#160;&#160;&#160;((<a class="el" href="structL2C__310__TypeDef.html">L2C_310_TypeDef</a> *)<a class="el" href="ARMCA9_8h.html#a5ce89d9feb78e20a4034f025eec392b4">L2C_310_BASE</a>)</td></tr>
<tr class="memdesc:ga3b08fba5b9be921c8a971231f75f8764"><td class="mdescLeft">&#160;</td><td class="mdescRight">L2C_310 register set access pointer.  <a href="group__L2__cache__functions.html#ga3b08fba5b9be921c8a971231f75f8764">More...</a><br/></td></tr>
<tr class="separator:ga3b08fba5b9be921c8a971231f75f8764"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82e193c0016a9377274756b2673464a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a>&#160;&#160;&#160;((<a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a>      *)     <a class="el" href="ARMCA9_8h.html#a5cc9c031f86d3fcb7efcbe2fce4cd552">GIC_DISTRIBUTOR_BASE</a> )</td></tr>
<tr class="memdesc:ga82e193c0016a9377274756b2673464a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">GIC Distributor register set access pointer.  <a href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">More...</a><br/></td></tr>
<tr class="separator:ga82e193c0016a9377274756b2673464a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga31a083dbdc5cb84178dbf184286180e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a>&#160;&#160;&#160;((<a class="el" href="structGICInterface__Type.html">GICInterface_Type</a>        *)     <a class="el" href="ARMCA9_8h.html#adc560f42c09a0a3ce5dcc4aa898209ca">GIC_INTERFACE_BASE</a> )</td></tr>
<tr class="memdesc:ga31a083dbdc5cb84178dbf184286180e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">GIC Interface register set access pointer.  <a href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">More...</a><br/></td></tr>
<tr class="separator:ga31a083dbdc5cb84178dbf184286180e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaaf976e808e92970c4853195f46f86aa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#gaaaf976e808e92970c4853195f46f86aa">PTIM</a>&#160;&#160;&#160;((<a class="el" href="structTimer__Type.html">Timer_Type</a> *) <a class="el" href="ARMCA9_8h.html#a251f8c6600afee0dddf950c7a41d4723">TIMER_BASE</a> )</td></tr>
<tr class="memdesc:gaaaf976e808e92970c4853195f46f86aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer register struct.  <a href="group__PTM__timer__functions.html#gaaaf976e808e92970c4853195f46f86aa">More...</a><br/></td></tr>
<tr class="separator:gaaaf976e808e92970c4853195f46f86aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a647b0a71258678d75aed0aadd5801612"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a647b0a71258678d75aed0aadd5801612">GIC_SetSecurity</a>&#160;&#160;&#160;<a class="el" href="core__ca_8h.html#ab875d63dc51a75149802945bb00e2695">GIC_SetGroup</a></td></tr>
<tr class="separator:a647b0a71258678d75aed0aadd5801612"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aea0bba954f8c3b032cf9a6540277ddef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#aea0bba954f8c3b032cf9a6540277ddef">GIC_GetSecurity</a>&#160;&#160;&#160;<a class="el" href="core__ca_8h.html#ae161d7a866cb61f92b808ae98fa7c812">GIC_GetGroup</a></td></tr>
<tr class="separator:aea0bba954f8c3b032cf9a6540277ddef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ab4ff3ff904df46da18f5532ceb1e89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga4ab4ff3ff904df46da18f5532ceb1e89">SECTION_DESCRIPTOR</a>&#160;&#160;&#160;(0x2)</td></tr>
<tr class="separator:ga4ab4ff3ff904df46da18f5532ceb1e89"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a16f225cca51a80c5cf1c9c002cfd2dba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a16f225cca51a80c5cf1c9c002cfd2dba">SECTION_MASK</a>&#160;&#160;&#160;(0xFFFFFFFC)</td></tr>
<tr class="separator:a16f225cca51a80c5cf1c9c002cfd2dba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3052ba3d97ad157189a6c6fce15b1b6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a3052ba3d97ad157189a6c6fce15b1b6a">SECTION_TEXCB_MASK</a>&#160;&#160;&#160;(0xFFFF8FF3)</td></tr>
<tr class="separator:a3052ba3d97ad157189a6c6fce15b1b6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa77545190c32bb2f4d2d86e41552daef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gaa77545190c32bb2f4d2d86e41552daef">SECTION_B_SHIFT</a>&#160;&#160;&#160;(2)</td></tr>
<tr class="separator:gaa77545190c32bb2f4d2d86e41552daef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0b3a2eccc4f9c249e928d359c43c20c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gae0b3a2eccc4f9c249e928d359c43c20c">SECTION_C_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
<tr class="separator:gae0b3a2eccc4f9c249e928d359c43c20c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad84432cb37ae093f7609f8f29f42c1f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gad84432cb37ae093f7609f8f29f42c1f4">SECTION_TEX0_SHIFT</a>&#160;&#160;&#160;(12)</td></tr>
<tr class="separator:gad84432cb37ae093f7609f8f29f42c1f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga531cafc5eca8ade67a6fb83b35f8520e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga531cafc5eca8ade67a6fb83b35f8520e">SECTION_TEX1_SHIFT</a>&#160;&#160;&#160;(13)</td></tr>
<tr class="separator:ga531cafc5eca8ade67a6fb83b35f8520e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a6d854746a9c0049f9a91188092a55f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga8a6d854746a9c0049f9a91188092a55f">SECTION_TEX2_SHIFT</a>&#160;&#160;&#160;(14)</td></tr>
<tr class="separator:ga8a6d854746a9c0049f9a91188092a55f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a83cb551c9fa708e33082c682be614334"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a83cb551c9fa708e33082c682be614334">SECTION_XN_MASK</a>&#160;&#160;&#160;(0xFFFFFFEF)</td></tr>
<tr class="separator:a83cb551c9fa708e33082c682be614334"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6cdc2db0ca695fd1191305a13e66c0a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga6cdc2db0ca695fd1191305a13e66c0a7">SECTION_XN_SHIFT</a>&#160;&#160;&#160;(4)</td></tr>
<tr class="separator:ga6cdc2db0ca695fd1191305a13e66c0a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a90a30c02512cbea24791212af9f2cd9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a90a30c02512cbea24791212af9f2cd9f">SECTION_DOMAIN_MASK</a>&#160;&#160;&#160;(0xFFFFFE1F)</td></tr>
<tr class="separator:a90a30c02512cbea24791212af9f2cd9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga70cc38b984789323feecd97033a66757"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga70cc38b984789323feecd97033a66757">SECTION_DOMAIN_SHIFT</a>&#160;&#160;&#160;(5)</td></tr>
<tr class="separator:ga70cc38b984789323feecd97033a66757"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad32d146d84a9d7f964f28f1dadc98bcb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ad32d146d84a9d7f964f28f1dadc98bcb">SECTION_P_MASK</a>&#160;&#160;&#160;(0xFFFFFDFF)</td></tr>
<tr class="separator:ad32d146d84a9d7f964f28f1dadc98bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f27fa21cb70abad114374f33a562988"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga8f27fa21cb70abad114374f33a562988">SECTION_P_SHIFT</a>&#160;&#160;&#160;(9)</td></tr>
<tr class="separator:ga8f27fa21cb70abad114374f33a562988"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a725efc96ea9aa940fefcf013bce6ca8c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a725efc96ea9aa940fefcf013bce6ca8c">SECTION_AP_MASK</a>&#160;&#160;&#160;(0xFFFF73FF)</td></tr>
<tr class="separator:a725efc96ea9aa940fefcf013bce6ca8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga274fa608581b227182ce92adec4597b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga274fa608581b227182ce92adec4597b5">SECTION_AP_SHIFT</a>&#160;&#160;&#160;(10)</td></tr>
<tr class="separator:ga274fa608581b227182ce92adec4597b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1b8b0d00bfc7cbeed67b82db26d98195"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga1b8b0d00bfc7cbeed67b82db26d98195">SECTION_AP2_SHIFT</a>&#160;&#160;&#160;(15)</td></tr>
<tr class="separator:ga1b8b0d00bfc7cbeed67b82db26d98195"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a42d3645aad501af4ef447186c01685b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a42d3645aad501af4ef447186c01685b7">SECTION_S_MASK</a>&#160;&#160;&#160;(0xFFFEFFFF)</td></tr>
<tr class="separator:a42d3645aad501af4ef447186c01685b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83a5fc538dad79161b122fb164d630fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga83a5fc538dad79161b122fb164d630fe">SECTION_S_SHIFT</a>&#160;&#160;&#160;(16)</td></tr>
<tr class="separator:ga83a5fc538dad79161b122fb164d630fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a01ceacdb3888d7cddcfeccfea9eb3658"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a01ceacdb3888d7cddcfeccfea9eb3658">SECTION_NG_MASK</a>&#160;&#160;&#160;(0xFFFDFFFF)</td></tr>
<tr class="separator:a01ceacdb3888d7cddcfeccfea9eb3658"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7af8adbf033d0a5c7b0889dd085041d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga7af8adbf033d0a5c7b0889dd085041d1">SECTION_NG_SHIFT</a>&#160;&#160;&#160;(17)</td></tr>
<tr class="separator:ga7af8adbf033d0a5c7b0889dd085041d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a057533871fa1af6db7a27b39d976ac95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a057533871fa1af6db7a27b39d976ac95">SECTION_NS_MASK</a>&#160;&#160;&#160;(0xFFF7FFFF)</td></tr>
<tr class="separator:a057533871fa1af6db7a27b39d976ac95"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga502d55a107c909e15be282d8fbe4a8ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga502d55a107c909e15be282d8fbe4a8ce">SECTION_NS_SHIFT</a>&#160;&#160;&#160;(19)</td></tr>
<tr class="separator:ga502d55a107c909e15be282d8fbe4a8ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82cb818cf0bcf9431ed9d0b52a39fe14"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga82cb818cf0bcf9431ed9d0b52a39fe14">PAGE_L1_DESCRIPTOR</a>&#160;&#160;&#160;(0x1)</td></tr>
<tr class="separator:ga82cb818cf0bcf9431ed9d0b52a39fe14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9fe764cc3a117a9ab93a301de8bceed1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a9fe764cc3a117a9ab93a301de8bceed1">PAGE_L1_MASK</a>&#160;&#160;&#160;(0xFFFFFFFC)</td></tr>
<tr class="separator:a9fe764cc3a117a9ab93a301de8bceed1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaefb20807cde04ea9fee6b197602348cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gaefb20807cde04ea9fee6b197602348cf">PAGE_L2_4K_DESC</a>&#160;&#160;&#160;(0x2)</td></tr>
<tr class="separator:gaefb20807cde04ea9fee6b197602348cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abd292694d0155e3b0d4c12895a6c8fa6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#abd292694d0155e3b0d4c12895a6c8fa6">PAGE_L2_4K_MASK</a>&#160;&#160;&#160;(0xFFFFFFFD)</td></tr>
<tr class="separator:abd292694d0155e3b0d4c12895a6c8fa6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf38d8149733ba83690fd04ac1204bde1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gaf38d8149733ba83690fd04ac1204bde1">PAGE_L2_64K_DESC</a>&#160;&#160;&#160;(0x1)</td></tr>
<tr class="separator:gaf38d8149733ba83690fd04ac1204bde1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab3a82626ee70e38285852a1128b75c7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ab3a82626ee70e38285852a1128b75c7a">PAGE_L2_64K_MASK</a>&#160;&#160;&#160;(0xFFFFFFFC)</td></tr>
<tr class="separator:ab3a82626ee70e38285852a1128b75c7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a234fceea67b5d6c41b0875852d86cc70"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a234fceea67b5d6c41b0875852d86cc70">PAGE_4K_TEXCB_MASK</a>&#160;&#160;&#160;(0xFFFFFE33)</td></tr>
<tr class="separator:a234fceea67b5d6c41b0875852d86cc70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga295b3b39fa6f7da3650a94551e28218b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga295b3b39fa6f7da3650a94551e28218b">PAGE_4K_B_SHIFT</a>&#160;&#160;&#160;(2)</td></tr>
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<tr class="memitem:ga17ad8e75e5987a1f98adfc783640b75f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga17ad8e75e5987a1f98adfc783640b75f">PAGE_4K_C_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
<tr class="separator:ga17ad8e75e5987a1f98adfc783640b75f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8069f8882920692467749cc65f50e1f8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga8069f8882920692467749cc65f50e1f8">PAGE_4K_TEX0_SHIFT</a>&#160;&#160;&#160;(6)</td></tr>
<tr class="separator:ga8069f8882920692467749cc65f50e1f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac0db1e472f79b641d0e51e4faa6e7e08"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gac0db1e472f79b641d0e51e4faa6e7e08">PAGE_4K_TEX1_SHIFT</a>&#160;&#160;&#160;(7)</td></tr>
<tr class="separator:gac0db1e472f79b641d0e51e4faa6e7e08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0e5c586a7e1928c7efa95e0d5f26e981"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga0e5c586a7e1928c7efa95e0d5f26e981">PAGE_4K_TEX2_SHIFT</a>&#160;&#160;&#160;(8)</td></tr>
<tr class="separator:ga0e5c586a7e1928c7efa95e0d5f26e981"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a666e7d1971403995104586f35d56590b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a666e7d1971403995104586f35d56590b">PAGE_64K_TEXCB_MASK</a>&#160;&#160;&#160;(0xFFFF8FF3)</td></tr>
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<tr class="memitem:gaedc4abb2636443389128258bd74ce0bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gaedc4abb2636443389128258bd74ce0bd">PAGE_64K_B_SHIFT</a>&#160;&#160;&#160;(2)</td></tr>
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<tr class="memitem:gabc1ce8b3d369d1e054fabf87514c4cd6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gabc1ce8b3d369d1e054fabf87514c4cd6">PAGE_64K_C_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
<tr class="separator:gabc1ce8b3d369d1e054fabf87514c4cd6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab4d67a1d5aa37623272abe4db32677ec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gab4d67a1d5aa37623272abe4db32677ec">PAGE_64K_TEX0_SHIFT</a>&#160;&#160;&#160;(12)</td></tr>
<tr class="separator:gab4d67a1d5aa37623272abe4db32677ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c910152d27ce0a1552e3bb3c88782a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga9c910152d27ce0a1552e3bb3c88782a6">PAGE_64K_TEX1_SHIFT</a>&#160;&#160;&#160;(13)</td></tr>
<tr class="separator:ga9c910152d27ce0a1552e3bb3c88782a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ec4dcea202b5ebc15419f7410a6c0b0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga8ec4dcea202b5ebc15419f7410a6c0b0">PAGE_64K_TEX2_SHIFT</a>&#160;&#160;&#160;(14)</td></tr>
<tr class="separator:ga8ec4dcea202b5ebc15419f7410a6c0b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa488ef0c274f8ae125f61129745b1629"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#aa488ef0c274f8ae125f61129745b1629">PAGE_TEXCB_MASK</a>&#160;&#160;&#160;(0xFFFF8FF3)</td></tr>
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<tr class="memitem:ga3a660cdbc121e6510ed815fcb5bc8a44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga3a660cdbc121e6510ed815fcb5bc8a44">PAGE_B_SHIFT</a>&#160;&#160;&#160;(2)</td></tr>
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<tr class="memitem:gad9fc2f0cbe58ae4f1afea3cf9817b450"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gad9fc2f0cbe58ae4f1afea3cf9817b450">PAGE_C_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
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<tr class="memitem:ga5833dc0a939f8d33299d8c8995a06589"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga5833dc0a939f8d33299d8c8995a06589">PAGE_TEX_SHIFT</a>&#160;&#160;&#160;(12)</td></tr>
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<tr class="memitem:a522f61b0d301d6f69c33a629e1699c7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a522f61b0d301d6f69c33a629e1699c7e">PAGE_XN_4K_MASK</a>&#160;&#160;&#160;(0xFFFFFFFE)</td></tr>
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<tr class="memitem:ga9be26955f4a44c54008c55de61652539"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga9be26955f4a44c54008c55de61652539">PAGE_XN_4K_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
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<tr class="memitem:ae0445cb4d6dc78359074cbb2776e3b5c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ae0445cb4d6dc78359074cbb2776e3b5c">PAGE_XN_64K_MASK</a>&#160;&#160;&#160;(0xFFFF7FFF)</td></tr>
<tr class="separator:ae0445cb4d6dc78359074cbb2776e3b5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab34b65fbaaec1287daef459071c5c5c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gab34b65fbaaec1287daef459071c5c5c9">PAGE_XN_64K_SHIFT</a>&#160;&#160;&#160;(15)</td></tr>
<tr class="separator:gab34b65fbaaec1287daef459071c5c5c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0a48a4e79188149fbe886a698b6d9cb4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a0a48a4e79188149fbe886a698b6d9cb4">PAGE_DOMAIN_MASK</a>&#160;&#160;&#160;(0xFFFFFE1F)</td></tr>
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<tr class="memitem:gade787969e64896d0c8fe554f6aa1bc9e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gade787969e64896d0c8fe554f6aa1bc9e">PAGE_DOMAIN_SHIFT</a>&#160;&#160;&#160;(5)</td></tr>
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<tr class="memitem:a604f4f13fcb78ff08d65ef4a1a3f7933"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a604f4f13fcb78ff08d65ef4a1a3f7933">PAGE_P_MASK</a>&#160;&#160;&#160;(0xFFFFFDFF)</td></tr>
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<tr class="memitem:ga46a63dfcf084d48ccf27987bab48417a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga46a63dfcf084d48ccf27987bab48417a">PAGE_P_SHIFT</a>&#160;&#160;&#160;(9)</td></tr>
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<tr class="memitem:af7d3ee23adcaf9221967791f0e64d830"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#af7d3ee23adcaf9221967791f0e64d830">PAGE_AP_MASK</a>&#160;&#160;&#160;(0xFFFFFDCF)</td></tr>
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<tr class="memitem:gafed0cfe8a8ab67fe26e961b876db13a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gafed0cfe8a8ab67fe26e961b876db13a3">PAGE_AP_SHIFT</a>&#160;&#160;&#160;(4)</td></tr>
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<tr class="memitem:gad2d3cf0695c98dc2c4e37ebeb9235b2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gad2d3cf0695c98dc2c4e37ebeb9235b2c">PAGE_AP2_SHIFT</a>&#160;&#160;&#160;(9)</td></tr>
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<tr class="memitem:ac44cd885615a54131c372abfdc2d5c66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ac44cd885615a54131c372abfdc2d5c66">PAGE_S_MASK</a>&#160;&#160;&#160;(0xFFFFFBFF)</td></tr>
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<tr class="memitem:ga1d9a3ed8dfa64aba257e2273d2613bce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga1d9a3ed8dfa64aba257e2273d2613bce">PAGE_S_SHIFT</a>&#160;&#160;&#160;(10)</td></tr>
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<tr class="memitem:add5d44ba746fe4d17d8b06a1086aa853"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#add5d44ba746fe4d17d8b06a1086aa853">PAGE_NG_MASK</a>&#160;&#160;&#160;(0xFFFFF7FF)</td></tr>
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<tr class="memitem:ga1d9196f2dd260244a4ad7e5b70b0e4c7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga1d9196f2dd260244a4ad7e5b70b0e4c7">PAGE_NG_SHIFT</a>&#160;&#160;&#160;(11)</td></tr>
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<tr class="memitem:a618b1432615c3242f53360d4364c5797"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a618b1432615c3242f53360d4364c5797">PAGE_NS_MASK</a>&#160;&#160;&#160;(0xFFFFFFF7)</td></tr>
<tr class="separator:a618b1432615c3242f53360d4364c5797"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49740f5181adebe63b11c68db731bb0f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga49740f5181adebe63b11c68db731bb0f">PAGE_NS_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
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<tr class="memitem:a470b88645153aad94b09485f3108c641"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a470b88645153aad94b09485f3108c641">section_normal_nc</a>(descriptor_l1, region)</td></tr>
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<tr class="memitem:gad598239f9bb9b6ae2bec8278305640b4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gad598239f9bb9b6ae2bec8278305640b4">section_normal_cod</a>(descriptor_l1, region)</td></tr>
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<tr class="memitem:ga33c6ad1fc06648fe50f8b21554c9bccb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga33c6ad1fc06648fe50f8b21554c9bccb">section_device_rw</a>(descriptor_l1, region)</td></tr>
<tr class="separator:ga33c6ad1fc06648fe50f8b21554c9bccb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe66b1515bf7d251a9a3218162637a22"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gafe66b1515bf7d251a9a3218162637a22">page4k_device_rw</a>(descriptor_l1, descriptor_l2, region)</td></tr>
<tr class="separator:gafe66b1515bf7d251a9a3218162637a22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6c8c84bdeebf350d97eb3a99bd11845f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga6c8c84bdeebf350d97eb3a99bd11845f">page64k_device_rw</a>(descriptor_l1, descriptor_l2, region)</td></tr>
<tr class="separator:ga6c8c84bdeebf350d97eb3a99bd11845f"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:gab184b824a6d7cb728bd46c6abcd0c21a"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gab184b824a6d7cb728bd46c6abcd0c21a">mmu_region_size_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gab184b824a6d7cb728bd46c6abcd0c21aacb7227be6a36b93e485b62e3acddae51">SECTION</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gab184b824a6d7cb728bd46c6abcd0c21aa99ce0ce05e9c418dc6bddcc47b2fa05a">PAGE_4k</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gab184b824a6d7cb728bd46c6abcd0c21aafc53512bbf834739fcb97ad1c0f444fc">PAGE_64k</a>
<br/>
 }</td></tr>
<tr class="separator:gab184b824a6d7cb728bd46c6abcd0c21a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83ac8de9263f89879079da521e86d5f2"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2">mmu_memory_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2a50d1448013c6f17125caee18aa418af7">NORMAL</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2a28b8a7b4b6c2a98af7cf438255207174">DEVICE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2a9b78345535e6af3288cc69a572338808">SHARED_DEVICE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2a765e5cbb28da82e4d8f7e94fce32a7e0">NON_SHARED_DEVICE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2a0a4d347de23312717e6e57b04f0b014e">STRONGLY_ORDERED</a>
<br/>
 }</td></tr>
<tr class="separator:ga83ac8de9263f89879079da521e86d5f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga11c86b7b193efb2c59b6a2179a02f584"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584">mmu_cacheability_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584a61a625191f7d288011e20bf2104ee151">NON_CACHEABLE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584a23294b86e8dbf6ff0fa98b678e8fd667">WB_WA</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584ab044987527e64a06f65aa6f2ae0e4e7e">WT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584aca2e70f575679d6f3e2e340d1ede4f13">WB_NO_WA</a>
<br/>
 }</td></tr>
<tr class="separator:ga11c86b7b193efb2c59b6a2179a02f584"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga06d94c0eaa22d713636acaff81485409"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga06d94c0eaa22d713636acaff81485409">mmu_ecc_check_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga06d94c0eaa22d713636acaff81485409a48ce2ec8ec49f0167a7d571081a9301f">ECC_DISABLED</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga06d94c0eaa22d713636acaff81485409af0e84d9540ed9d79f01caad9841d414d">ECC_ENABLED</a>
<br/>
 }</td></tr>
<tr class="separator:ga06d94c0eaa22d713636acaff81485409"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2fe1157deda82e66b9a1b19772309b63"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga2fe1157deda82e66b9a1b19772309b63">mmu_execute_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga2fe1157deda82e66b9a1b19772309b63a887d2cbfd9131de5cc3745731421b34b">EXECUTE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga2fe1157deda82e66b9a1b19772309b63ad1d1eabb1b07ce896d5308a1144cf87a">NON_EXECUTE</a>
<br/>
 }</td></tr>
<tr class="separator:ga2fe1157deda82e66b9a1b19772309b63"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04160605fbe20914c8ef020430684a30"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga04160605fbe20914c8ef020430684a30">mmu_global_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga04160605fbe20914c8ef020430684a30afde1bb5ef04b28059e61df449501f1c0">GLOBAL</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga04160605fbe20914c8ef020430684a30a611c091f2869100296a98915a19ee018">NON_GLOBAL</a>
<br/>
 }</td></tr>
<tr class="separator:ga04160605fbe20914c8ef020430684a30"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab884a11fa8d094573ab77fb1c0f8d8a7"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gab884a11fa8d094573ab77fb1c0f8d8a7">mmu_shared_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gab884a11fa8d094573ab77fb1c0f8d8a7a4a237208271e450df0a72c07169683b4">NON_SHARED</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gab884a11fa8d094573ab77fb1c0f8d8a7a9c46e16a4ab019339596acadeefc8c53">SHARED</a>
<br/>
 }</td></tr>
<tr class="separator:gab884a11fa8d094573ab77fb1c0f8d8a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3d277641df9fb3bb3b555e2e79dd639"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#gac3d277641df9fb3bb3b555e2e79dd639">mmu_secure_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gac3d277641df9fb3bb3b555e2e79dd639aa9dea2ba3f45f7d12b274eb6ab7d28d9">SECURE</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#gac3d277641df9fb3bb3b555e2e79dd639a9e08ca26fdda38ef731f13e4f058ef6f">NON_SECURE</a>
<br/>
 }</td></tr>
<tr class="separator:gac3d277641df9fb3bb3b555e2e79dd639"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2ee598252f996e4f96640b096291d280"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280">mmu_access_Type</a> { <br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280a4c66cd69a45985317939a53d820fb9da">NO_ACCESS</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280aec2497e0c8af01c04bec31ec0d1d7847">RW</a>, 
<br/>
&#160;&#160;<a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280acb9be765f361bb7efb9073730aac92c6">READ</a>
<br/>
 }</td></tr>
<tr class="separator:ga2ee598252f996e4f96640b096291d280"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gaff8a4966eff1ada5cba80f2b689446db"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#gaff8a4966eff1ada5cba80f2b689446db">L1C_EnableCaches</a> (void)</td></tr>
<tr class="memdesc:gaff8a4966eff1ada5cba80f2b689446db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Caches by setting I and C bits in SCTLR register.  <a href="group__L1__cache__functions.html#gaff8a4966eff1ada5cba80f2b689446db">More...</a><br/></td></tr>
<tr class="separator:gaff8a4966eff1ada5cba80f2b689446db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga320ef6fd1dd65f2f82e64c096a4994a6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga320ef6fd1dd65f2f82e64c096a4994a6">L1C_DisableCaches</a> (void)</td></tr>
<tr class="memdesc:ga320ef6fd1dd65f2f82e64c096a4994a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Caches by clearing I and C bits in SCTLR register.  <a href="group__L1__cache__functions.html#ga320ef6fd1dd65f2f82e64c096a4994a6">More...</a><br/></td></tr>
<tr class="separator:ga320ef6fd1dd65f2f82e64c096a4994a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5fb36b4496e64472849f7811970c581"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#gaa5fb36b4496e64472849f7811970c581">L1C_EnableBTAC</a> (void)</td></tr>
<tr class="memdesc:gaa5fb36b4496e64472849f7811970c581"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Branch Prediction by setting Z bit in SCTLR register.  <a href="group__L1__cache__functions.html#gaa5fb36b4496e64472849f7811970c581">More...</a><br/></td></tr>
<tr class="separator:gaa5fb36b4496e64472849f7811970c581"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8695cf1f4a7f3789b93c41dc4eeb51d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#gab8695cf1f4a7f3789b93c41dc4eeb51d">L1C_DisableBTAC</a> (void)</td></tr>
<tr class="memdesc:gab8695cf1f4a7f3789b93c41dc4eeb51d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Branch Prediction by clearing Z bit in SCTLR register.  <a href="group__L1__cache__functions.html#gab8695cf1f4a7f3789b93c41dc4eeb51d">More...</a><br/></td></tr>
<tr class="separator:gab8695cf1f4a7f3789b93c41dc4eeb51d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0d732293be6a928db184b59aadc1979"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#gad0d732293be6a928db184b59aadc1979">L1C_InvalidateBTAC</a> (void)</td></tr>
<tr class="memdesc:gad0d732293be6a928db184b59aadc1979"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate entire branch predictor array.  <a href="group__L1__cache__functions.html#gad0d732293be6a928db184b59aadc1979">More...</a><br/></td></tr>
<tr class="separator:gad0d732293be6a928db184b59aadc1979"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac932810cfe83f087590859010972645e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#gac932810cfe83f087590859010972645e">L1C_InvalidateICacheAll</a> (void)</td></tr>
<tr class="memdesc:gac932810cfe83f087590859010972645e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate the whole instruction cache.  <a href="group__L1__cache__functions.html#gac932810cfe83f087590859010972645e">More...</a><br/></td></tr>
<tr class="separator:gac932810cfe83f087590859010972645e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9eb6f0a7c9c04cc49efd964eb59ba26f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga9eb6f0a7c9c04cc49efd964eb59ba26f">L1C_CleanDCacheMVA</a> (void *va)</td></tr>
<tr class="memdesc:ga9eb6f0a7c9c04cc49efd964eb59ba26f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean data cache line by address.  <a href="group__L1__cache__functions.html#ga9eb6f0a7c9c04cc49efd964eb59ba26f">More...</a><br/></td></tr>
<tr class="separator:ga9eb6f0a7c9c04cc49efd964eb59ba26f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9209853937940991daf70edd6bc633fe"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga9209853937940991daf70edd6bc633fe">L1C_InvalidateDCacheMVA</a> (void *va)</td></tr>
<tr class="memdesc:ga9209853937940991daf70edd6bc633fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate data cache line by address.  <a href="group__L1__cache__functions.html#ga9209853937940991daf70edd6bc633fe">More...</a><br/></td></tr>
<tr class="separator:ga9209853937940991daf70edd6bc633fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7646a5e01b529566968f393e485f46a2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga7646a5e01b529566968f393e485f46a2">L1C_CleanInvalidateDCacheMVA</a> (void *va)</td></tr>
<tr class="memdesc:ga7646a5e01b529566968f393e485f46a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and Invalidate data cache by address.  <a href="group__L1__cache__functions.html#ga7646a5e01b529566968f393e485f46a2">More...</a><br/></td></tr>
<tr class="separator:ga7646a5e01b529566968f393e485f46a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a35988a42567ca868bffd0b6171021ecb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a35988a42567ca868bffd0b6171021ecb">__log2_up</a> (uint32_t n)</td></tr>
<tr class="memdesc:a35988a42567ca868bffd0b6171021ecb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Calculate log2 rounded up.  <a href="#a35988a42567ca868bffd0b6171021ecb">More...</a><br/></td></tr>
<tr class="separator:a35988a42567ca868bffd0b6171021ecb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5ace5c651cf18aaa7659e1fbe6e77988"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a5ace5c651cf18aaa7659e1fbe6e77988">__L1C_MaintainDCacheSetWay</a> (uint32_t level, uint32_t maint)</td></tr>
<tr class="memdesc:a5ace5c651cf18aaa7659e1fbe6e77988"><td class="mdescLeft">&#160;</td><td class="mdescRight">Apply cache maintenance to given cache level.  <a href="#a5ace5c651cf18aaa7659e1fbe6e77988">More...</a><br/></td></tr>
<tr class="separator:a5ace5c651cf18aaa7659e1fbe6e77988"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga30d7632156a30a3b75064f6d15b8f850"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga30d7632156a30a3b75064f6d15b8f850">L1C_CleanInvalidateCache</a> (uint32_t op)</td></tr>
<tr class="memdesc:ga30d7632156a30a3b75064f6d15b8f850"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and Invalidate the entire data or unified cache Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency.  <a href="group__L1__cache__functions.html#ga30d7632156a30a3b75064f6d15b8f850">More...</a><br/></td></tr>
<tr class="separator:ga30d7632156a30a3b75064f6d15b8f850"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga722ceb077e491bb4befcfbb3aee9b20b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#acdc36c1b3d3e16c17a73889b7d06d0d2">CMSIS_DEPRECATED</a> <br class="typebreak"/>
<a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga722ceb077e491bb4befcfbb3aee9b20b">__L1C_CleanInvalidateCache</a> (uint32_t op)</td></tr>
<tr class="memdesc:ga722ceb077e491bb4befcfbb3aee9b20b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and Invalidate the entire data or unified cache Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency.  <a href="group__L1__cache__functions.html#ga722ceb077e491bb4befcfbb3aee9b20b">More...</a><br/></td></tr>
<tr class="separator:ga722ceb077e491bb4befcfbb3aee9b20b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae895f75c4f3539058232f555d79e5df3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#gae895f75c4f3539058232f555d79e5df3">L1C_InvalidateDCacheAll</a> (void)</td></tr>
<tr class="memdesc:gae895f75c4f3539058232f555d79e5df3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate the whole data cache.  <a href="group__L1__cache__functions.html#gae895f75c4f3539058232f555d79e5df3">More...</a><br/></td></tr>
<tr class="separator:gae895f75c4f3539058232f555d79e5df3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga70359d824bf26f376e3d7cb9c787da27"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga70359d824bf26f376e3d7cb9c787da27">L1C_CleanDCacheAll</a> (void)</td></tr>
<tr class="memdesc:ga70359d824bf26f376e3d7cb9c787da27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean the whole data cache.  <a href="group__L1__cache__functions.html#ga70359d824bf26f376e3d7cb9c787da27">More...</a><br/></td></tr>
<tr class="separator:ga70359d824bf26f376e3d7cb9c787da27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga92b5babf7317abe3815f61a2731735c3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L1__cache__functions.html#ga92b5babf7317abe3815f61a2731735c3">L1C_CleanInvalidateDCacheAll</a> (void)</td></tr>
<tr class="memdesc:ga92b5babf7317abe3815f61a2731735c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and invalidate the whole data cache.  <a href="group__L1__cache__functions.html#ga92b5babf7317abe3815f61a2731735c3">More...</a><br/></td></tr>
<tr class="separator:ga92b5babf7317abe3815f61a2731735c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga164c59c55e2d18bf8a94dc91c0f4ce68"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga164c59c55e2d18bf8a94dc91c0f4ce68">L2C_Sync</a> (void)</td></tr>
<tr class="memdesc:ga164c59c55e2d18bf8a94dc91c0f4ce68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cache Sync operation by writing CACHE_SYNC register.  <a href="group__L2__cache__functions.html#ga164c59c55e2d18bf8a94dc91c0f4ce68">More...</a><br/></td></tr>
<tr class="separator:ga164c59c55e2d18bf8a94dc91c0f4ce68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75af64212e1d3d0b3ade860c365e95b3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga75af64212e1d3d0b3ade860c365e95b3">L2C_GetID</a> (void)</td></tr>
<tr class="memdesc:ga75af64212e1d3d0b3ade860c365e95b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read cache controller cache ID from CACHE_ID register.  <a href="group__L2__cache__functions.html#ga75af64212e1d3d0b3ade860c365e95b3">More...</a><br/></td></tr>
<tr class="separator:ga75af64212e1d3d0b3ade860c365e95b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0c334fa25720d77e78cfa187bdf833be"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga0c334fa25720d77e78cfa187bdf833be">L2C_GetType</a> (void)</td></tr>
<tr class="memdesc:ga0c334fa25720d77e78cfa187bdf833be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read cache controller cache type from CACHE_TYPE register.  <a href="group__L2__cache__functions.html#ga0c334fa25720d77e78cfa187bdf833be">More...</a><br/></td></tr>
<tr class="separator:ga0c334fa25720d77e78cfa187bdf833be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5b0ea2db52d137b5531ce568479c9d17"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga5b0ea2db52d137b5531ce568479c9d17">L2C_InvAllByWay</a> (void)</td></tr>
<tr class="memdesc:ga5b0ea2db52d137b5531ce568479c9d17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate all cache by way.  <a href="group__L2__cache__functions.html#ga5b0ea2db52d137b5531ce568479c9d17">More...</a><br/></td></tr>
<tr class="separator:ga5b0ea2db52d137b5531ce568479c9d17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd0a9b10926537fa283c0bb30d54abc7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#gabd0a9b10926537fa283c0bb30d54abc7">L2C_CleanInvAllByWay</a> (void)</td></tr>
<tr class="memdesc:gabd0a9b10926537fa283c0bb30d54abc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and Invalidate all cache by way.  <a href="group__L2__cache__functions.html#gabd0a9b10926537fa283c0bb30d54abc7">More...</a><br/></td></tr>
<tr class="separator:gabd0a9b10926537fa283c0bb30d54abc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga720c36b4cd1d6c070ed0d2c49cffd7e1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga720c36b4cd1d6c070ed0d2c49cffd7e1">L2C_Enable</a> (void)</td></tr>
<tr class="memdesc:ga720c36b4cd1d6c070ed0d2c49cffd7e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Level 2 Cache.  <a href="group__L2__cache__functions.html#ga720c36b4cd1d6c070ed0d2c49cffd7e1">More...</a><br/></td></tr>
<tr class="separator:ga720c36b4cd1d6c070ed0d2c49cffd7e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66767e7f30f52d72de72231b2d6abd34"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga66767e7f30f52d72de72231b2d6abd34">L2C_Disable</a> (void)</td></tr>
<tr class="memdesc:ga66767e7f30f52d72de72231b2d6abd34"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Level 2 Cache.  <a href="group__L2__cache__functions.html#ga66767e7f30f52d72de72231b2d6abd34">More...</a><br/></td></tr>
<tr class="separator:ga66767e7f30f52d72de72231b2d6abd34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4cf213e72c97776def35ab8223face82"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga4cf213e72c97776def35ab8223face82">L2C_InvPa</a> (void *pa)</td></tr>
<tr class="memdesc:ga4cf213e72c97776def35ab8223face82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate cache by physical address.  <a href="group__L2__cache__functions.html#ga4cf213e72c97776def35ab8223face82">More...</a><br/></td></tr>
<tr class="separator:ga4cf213e72c97776def35ab8223face82"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga242f6fa13f33e7d5cdd7d92935d52f5f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga242f6fa13f33e7d5cdd7d92935d52f5f">L2C_CleanPa</a> (void *pa)</td></tr>
<tr class="memdesc:ga242f6fa13f33e7d5cdd7d92935d52f5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean cache by physical address.  <a href="group__L2__cache__functions.html#ga242f6fa13f33e7d5cdd7d92935d52f5f">More...</a><br/></td></tr>
<tr class="separator:ga242f6fa13f33e7d5cdd7d92935d52f5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaff11c6afa9eaacb4cdfcfe5c36f57eb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#gaaff11c6afa9eaacb4cdfcfe5c36f57eb">L2C_CleanInvPa</a> (void *pa)</td></tr>
<tr class="memdesc:gaaff11c6afa9eaacb4cdfcfe5c36f57eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and invalidate cache by physical address.  <a href="group__L2__cache__functions.html#gaaff11c6afa9eaacb4cdfcfe5c36f57eb">More...</a><br/></td></tr>
<tr class="separator:gaaff11c6afa9eaacb4cdfcfe5c36f57eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f44df6823e90178183257e096e5cac6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6">GIC_EnableDistributor</a> (void)</td></tr>
<tr class="memdesc:ga0f44df6823e90178183257e096e5cac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the interrupt distributor using the GIC's CTLR register.  <a href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6">More...</a><br/></td></tr>
<tr class="separator:ga0f44df6823e90178183257e096e5cac6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga363311538d4a4d750197b9936505d466"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga363311538d4a4d750197b9936505d466">GIC_DisableDistributor</a> (void)</td></tr>
<tr class="memdesc:ga363311538d4a4d750197b9936505d466"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the interrupt distributor using the GIC's CTLR register.  <a href="group__GIC__functions.html#ga363311538d4a4d750197b9936505d466">More...</a><br/></td></tr>
<tr class="separator:ga363311538d4a4d750197b9936505d466"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d93d39736ef5e379e6511430ee6e75f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga7d93d39736ef5e379e6511430ee6e75f">GIC_DistributorInfo</a> (void)</td></tr>
<tr class="memdesc:ga7d93d39736ef5e379e6511430ee6e75f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the GIC's TYPER register.  <a href="group__GIC__functions.html#ga7d93d39736ef5e379e6511430ee6e75f">More...</a><br/></td></tr>
<tr class="separator:ga7d93d39736ef5e379e6511430ee6e75f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga1481d0cdf78f8c93fb2a710a519c4dc6">GIC_DistributorImplementer</a> (void)</td></tr>
<tr class="memdesc:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the GIC's IIDR register.  <a href="group__GIC__functions.html#ga1481d0cdf78f8c93fb2a710a519c4dc6">More...</a><br/></td></tr>
<tr class="separator:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b">GIC_SetTarget</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t cpu_target)</td></tr>
<tr class="memdesc:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the GIC's ITARGETSR register for the given interrupt.  <a href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b">More...</a><br/></td></tr>
<tr class="separator:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafccf881f9517592f30489bcabcb738a8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gafccf881f9517592f30489bcabcb738a8">GIC_GetTarget</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:gafccf881f9517592f30489bcabcb738a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the GIC's ITARGETSR register.  <a href="group__GIC__functions.html#gafccf881f9517592f30489bcabcb738a8">More...</a><br/></td></tr>
<tr class="separator:gafccf881f9517592f30489bcabcb738a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga758e5600d7f891e4f2f551bb45d07fce"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga758e5600d7f891e4f2f551bb45d07fce">GIC_EnableInterface</a> (void)</td></tr>
<tr class="memdesc:ga758e5600d7f891e4f2f551bb45d07fce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the CPU's interrupt interface.  <a href="group__GIC__functions.html#ga758e5600d7f891e4f2f551bb45d07fce">More...</a><br/></td></tr>
<tr class="separator:ga758e5600d7f891e4f2f551bb45d07fce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0605877ad627c1f4320e518725fd103e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga0605877ad627c1f4320e518725fd103e">GIC_DisableInterface</a> (void)</td></tr>
<tr class="memdesc:ga0605877ad627c1f4320e518725fd103e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the CPU's interrupt interface.  <a href="group__GIC__functions.html#ga0605877ad627c1f4320e518725fd103e">More...</a><br/></td></tr>
<tr class="separator:ga0605877ad627c1f4320e518725fd103e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc08bbc58b25fef0d24003313fd16eb8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> <a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a> (void)</td></tr>
<tr class="memdesc:gafc08bbc58b25fef0d24003313fd16eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the CPU's IAR register.  <a href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">More...</a><br/></td></tr>
<tr class="separator:gafc08bbc58b25fef0d24003313fd16eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac23f090f572a058b4a737f6613ded9cd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gac23f090f572a058b4a737f6613ded9cd">GIC_EndInterrupt</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:gac23f090f572a058b4a737f6613ded9cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the given interrupt number to the CPU's EOIR register.  <a href="group__GIC__functions.html#gac23f090f572a058b4a737f6613ded9cd">More...</a><br/></td></tr>
<tr class="separator:gac23f090f572a058b4a737f6613ded9cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeba215d9c4ec3599e0a168800288c3f3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaeba215d9c4ec3599e0a168800288c3f3">GIC_EnableIRQ</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:gaeba215d9c4ec3599e0a168800288c3f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the given interrupt using GIC's ISENABLER register.  <a href="group__GIC__functions.html#gaeba215d9c4ec3599e0a168800288c3f3">More...</a><br/></td></tr>
<tr class="separator:gaeba215d9c4ec3599e0a168800288c3f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abcd7d576ea634b1a708db9fda95d09df"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#abcd7d576ea634b1a708db9fda95d09df">GIC_GetEnableIRQ</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:abcd7d576ea634b1a708db9fda95d09df"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get interrupt enable status using GIC's ISENABLER register.  <a href="#abcd7d576ea634b1a708db9fda95d09df">More...</a><br/></td></tr>
<tr class="separator:abcd7d576ea634b1a708db9fda95d09df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2102399d255690c0674209a6faeec13d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d">GIC_DisableIRQ</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:ga2102399d255690c0674209a6faeec13d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disables the given interrupt using GIC's ICENABLER register.  <a href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d">More...</a><br/></td></tr>
<tr class="separator:ga2102399d255690c0674209a6faeec13d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab726a01df6ee9a480cc73910a06ddfb7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ab726a01df6ee9a480cc73910a06ddfb7">GIC_GetPendingIRQ</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:ab726a01df6ee9a480cc73910a06ddfb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get interrupt pending status from GIC's ISPENDR register.  <a href="#ab726a01df6ee9a480cc73910a06ddfb7">More...</a><br/></td></tr>
<tr class="separator:ab726a01df6ee9a480cc73910a06ddfb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18fbddf7f3594df141c97f61a71da47c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga18fbddf7f3594df141c97f61a71da47c">GIC_SetPendingIRQ</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:ga18fbddf7f3594df141c97f61a71da47c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the given interrupt as pending using GIC's ISPENDR register.  <a href="group__GIC__functions.html#ga18fbddf7f3594df141c97f61a71da47c">More...</a><br/></td></tr>
<tr class="separator:ga18fbddf7f3594df141c97f61a71da47c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga5ad17ad70f23d1ff36015ffac33d383d">GIC_ClearPendingIRQ</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the given interrupt from being pending using GIC's ICPENDR register.  <a href="group__GIC__functions.html#ga5ad17ad70f23d1ff36015ffac33d383d">More...</a><br/></td></tr>
<tr class="separator:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5dffcd04b18d2c3ee5a410e185ce5108"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a5dffcd04b18d2c3ee5a410e185ce5108">GIC_SetConfiguration</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t int_config)</td></tr>
<tr class="memdesc:a5dffcd04b18d2c3ee5a410e185ce5108"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the interrupt configuration using GIC's ICFGR register.  <a href="#a5dffcd04b18d2c3ee5a410e185ce5108">More...</a><br/></td></tr>
<tr class="separator:a5dffcd04b18d2c3ee5a410e185ce5108"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a43cfac7327b49e2a89d63abc99b6b06a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a43cfac7327b49e2a89d63abc99b6b06a">GIC_GetConfiguration</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:a43cfac7327b49e2a89d63abc99b6b06a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the interrupt configuration from the GIC's ICFGR register.  <a href="#a43cfac7327b49e2a89d63abc99b6b06a">More...</a><br/></td></tr>
<tr class="separator:a43cfac7327b49e2a89d63abc99b6b06a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27b9862b58290276851ec669cabf0f71"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t priority)</td></tr>
<tr class="memdesc:ga27b9862b58290276851ec669cabf0f71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the priority for the given interrupt in the GIC's IPRIORITYR register.  <a href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">More...</a><br/></td></tr>
<tr class="separator:ga27b9862b58290276851ec669cabf0f71"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga397048004654f792649742f95bf8ae67"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:ga397048004654f792649742f95bf8ae67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current interrupt priority from GIC's IPRIORITYR register.  <a href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">More...</a><br/></td></tr>
<tr class="separator:ga397048004654f792649742f95bf8ae67"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0">GIC_SetInterfacePriorityMask</a> (uint32_t priority)</td></tr>
<tr class="memdesc:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the interrupt priority mask using CPU's PMR register.  <a href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0">More...</a><br/></td></tr>
<tr class="separator:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2c5f9e5637560fc9d5c29d772580a728"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2c5f9e5637560fc9d5c29d772580a728">GIC_GetInterfacePriorityMask</a> (void)</td></tr>
<tr class="memdesc:ga2c5f9e5637560fc9d5c29d772580a728"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current interrupt priority mask from CPU's PMR register.  <a href="group__GIC__functions.html#ga2c5f9e5637560fc9d5c29d772580a728">More...</a><br/></td></tr>
<tr class="separator:ga2c5f9e5637560fc9d5c29d772580a728"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6">GIC_SetBinaryPoint</a> (uint32_t binary_point)</td></tr>
<tr class="memdesc:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the group priority and subpriority split point using CPU's BPR register.  <a href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6">More...</a><br/></td></tr>
<tr class="separator:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7046d8206ddd4696716726e68f85906"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaa7046d8206ddd4696716726e68f85906">GIC_GetBinaryPoint</a> (void)</td></tr>
<tr class="memdesc:gaa7046d8206ddd4696716726e68f85906"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current group priority and subpriority split point from CPU's BPR register.  <a href="group__GIC__functions.html#gaa7046d8206ddd4696716726e68f85906">More...</a><br/></td></tr>
<tr class="separator:gaa7046d8206ddd4696716726e68f85906"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gabc88483ecf94a2c222b644ecfa60eb9f">GIC_GetIRQStatus</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the status for a given interrupt.  <a href="group__GIC__functions.html#gabc88483ecf94a2c222b644ecfa60eb9f">More...</a><br/></td></tr>
<tr class="separator:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2de8850780af26e802ee4cc43e9da6e9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2de8850780af26e802ee4cc43e9da6e9">GIC_SendSGI</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t target_list, uint32_t filter_list)</td></tr>
<tr class="memdesc:ga2de8850780af26e802ee4cc43e9da6e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate a software interrupt using GIC's SGIR register.  <a href="group__GIC__functions.html#ga2de8850780af26e802ee4cc43e9da6e9">More...</a><br/></td></tr>
<tr class="separator:ga2de8850780af26e802ee4cc43e9da6e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8bb27e1bab132a8df44190adb996c2a1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga8bb27e1bab132a8df44190adb996c2a1">GIC_GetHighPendingIRQ</a> (void)</td></tr>
<tr class="memdesc:ga8bb27e1bab132a8df44190adb996c2a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the interrupt number of the highest interrupt pending from CPU's HPPIR register.  <a href="group__GIC__functions.html#ga8bb27e1bab132a8df44190adb996c2a1">More...</a><br/></td></tr>
<tr class="separator:ga8bb27e1bab132a8df44190adb996c2a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaba1b2665cdda47fc0bc3d7b90690dc50">GIC_GetInterfaceId</a> (void)</td></tr>
<tr class="memdesc:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides information about the implementer and revision of the CPU interface.  <a href="group__GIC__functions.html#gaba1b2665cdda47fc0bc3d7b90690dc50">More...</a><br/></td></tr>
<tr class="separator:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab875d63dc51a75149802945bb00e2695"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ab875d63dc51a75149802945bb00e2695">GIC_SetGroup</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t group)</td></tr>
<tr class="memdesc:ab875d63dc51a75149802945bb00e2695"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the interrupt group from the GIC's IGROUPR register.  <a href="#ab875d63dc51a75149802945bb00e2695">More...</a><br/></td></tr>
<tr class="separator:ab875d63dc51a75149802945bb00e2695"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae161d7a866cb61f92b808ae98fa7c812"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#ae161d7a866cb61f92b808ae98fa7c812">GIC_GetGroup</a> (<a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
<tr class="memdesc:ae161d7a866cb61f92b808ae98fa7c812"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the interrupt group from the GIC's IGROUPR register.  <a href="#ae161d7a866cb61f92b808ae98fa7c812">More...</a><br/></td></tr>
<tr class="separator:ae161d7a866cb61f92b808ae98fa7c812"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga07acd03d02683bb6e33e7f57f5f371d1">GIC_DistInit</a> (void)</td></tr>
<tr class="memdesc:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the interrupt distributor.  <a href="group__GIC__functions.html#ga07acd03d02683bb6e33e7f57f5f371d1">More...</a><br/></td></tr>
<tr class="separator:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga1c93f8af9f428cda8ec066bf4bfbade9">GIC_CPUInterfaceInit</a> (void)</td></tr>
<tr class="memdesc:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the CPU's interrupt interface.  <a href="group__GIC__functions.html#ga1c93f8af9f428cda8ec066bf4bfbade9">More...</a><br/></td></tr>
<tr class="separator:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga818881f69aae3eef6eb996bee6f6c63e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga818881f69aae3eef6eb996bee6f6c63e">GIC_Enable</a> (void)</td></tr>
<tr class="memdesc:ga818881f69aae3eef6eb996bee6f6c63e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize and enable the GIC.  <a href="group__GIC__functions.html#ga818881f69aae3eef6eb996bee6f6c63e">More...</a><br/></td></tr>
<tr class="separator:ga818881f69aae3eef6eb996bee6f6c63e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac09f09327fde6a6adffe0e6298eaa1db"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#gac09f09327fde6a6adffe0e6298eaa1db">PL1_SetCounterFrequency</a> (uint32_t value)</td></tr>
<tr class="memdesc:gac09f09327fde6a6adffe0e6298eaa1db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the frequency the timer shall run at.  <a href="group__PL1__timer__functions.html#gac09f09327fde6a6adffe0e6298eaa1db">More...</a><br/></td></tr>
<tr class="separator:gac09f09327fde6a6adffe0e6298eaa1db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae4edcfbdaf901a59a81d1fbf9845d9f7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#gae4edcfbdaf901a59a81d1fbf9845d9f7">PL1_SetLoadValue</a> (uint32_t value)</td></tr>
<tr class="memdesc:gae4edcfbdaf901a59a81d1fbf9845d9f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the reset value of the timer.  <a href="group__PL1__timer__functions.html#gae4edcfbdaf901a59a81d1fbf9845d9f7">More...</a><br/></td></tr>
<tr class="separator:gae4edcfbdaf901a59a81d1fbf9845d9f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a212e9457005edfb9f14afbf937ebf9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#ga8a212e9457005edfb9f14afbf937ebf9">PL1_GetCurrentValue</a> (void)</td></tr>
<tr class="memdesc:ga8a212e9457005edfb9f14afbf937ebf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current counter value.  <a href="group__PL1__timer__functions.html#ga8a212e9457005edfb9f14afbf937ebf9">More...</a><br/></td></tr>
<tr class="separator:ga8a212e9457005edfb9f14afbf937ebf9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac66bd336d2353f70aa8ebfc73aa3fc43"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#gac66bd336d2353f70aa8ebfc73aa3fc43">PL1_GetCurrentPhysicalValue</a> (void)</td></tr>
<tr class="memdesc:gac66bd336d2353f70aa8ebfc73aa3fc43"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current physical counter value.  <a href="group__PL1__timer__functions.html#gac66bd336d2353f70aa8ebfc73aa3fc43">More...</a><br/></td></tr>
<tr class="separator:gac66bd336d2353f70aa8ebfc73aa3fc43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab34067824971064a829e17b791070643"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#gab34067824971064a829e17b791070643">PL1_SetPhysicalCompareValue</a> (uint64_t value)</td></tr>
<tr class="memdesc:gab34067824971064a829e17b791070643"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the physical compare value.  <a href="group__PL1__timer__functions.html#gab34067824971064a829e17b791070643">More...</a><br/></td></tr>
<tr class="separator:gab34067824971064a829e17b791070643"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga341ae7d1ae29f4dc5dae6310fa453164"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#ga341ae7d1ae29f4dc5dae6310fa453164">PL1_GetPhysicalCompareValue</a> (void)</td></tr>
<tr class="memdesc:ga341ae7d1ae29f4dc5dae6310fa453164"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the physical compare value.  <a href="group__PL1__timer__functions.html#ga341ae7d1ae29f4dc5dae6310fa453164">More...</a><br/></td></tr>
<tr class="separator:ga341ae7d1ae29f4dc5dae6310fa453164"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2e2ea7eac12a90c6243000172bf774e1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#ga2e2ea7eac12a90c6243000172bf774e1">PL1_SetControl</a> (uint32_t value)</td></tr>
<tr class="memdesc:ga2e2ea7eac12a90c6243000172bf774e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the timer by setting the control value.  <a href="group__PL1__timer__functions.html#ga2e2ea7eac12a90c6243000172bf774e1">More...</a><br/></td></tr>
<tr class="separator:ga2e2ea7eac12a90c6243000172bf774e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7fda3fe3452565fbe46cb0ea53a9f8a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PL1__timer__functions.html#gaf7fda3fe3452565fbe46cb0ea53a9f8a">PL1_GetControl</a> (void)</td></tr>
<tr class="memdesc:gaf7fda3fe3452565fbe46cb0ea53a9f8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the control value.  <a href="group__PL1__timer__functions.html#gaf7fda3fe3452565fbe46cb0ea53a9f8a">More...</a><br/></td></tr>
<tr class="separator:gaf7fda3fe3452565fbe46cb0ea53a9f8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga30516fed24977be8eecf3efd8b6a2fea"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#ga30516fed24977be8eecf3efd8b6a2fea">PTIM_SetLoadValue</a> (uint32_t value)</td></tr>
<tr class="memdesc:ga30516fed24977be8eecf3efd8b6a2fea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the load value to timers LOAD register.  <a href="group__PTM__timer__functions.html#ga30516fed24977be8eecf3efd8b6a2fea">More...</a><br/></td></tr>
<tr class="separator:ga30516fed24977be8eecf3efd8b6a2fea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacca3bf92e93c69e538ff4618317f7bfa"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#gacca3bf92e93c69e538ff4618317f7bfa">PTIM_GetLoadValue</a> (void)</td></tr>
<tr class="memdesc:gacca3bf92e93c69e538ff4618317f7bfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the load value from timers LOAD register.  <a href="group__PTM__timer__functions.html#gacca3bf92e93c69e538ff4618317f7bfa">More...</a><br/></td></tr>
<tr class="separator:gacca3bf92e93c69e538ff4618317f7bfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a323bf405e32846a7e57344935e51de66"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a323bf405e32846a7e57344935e51de66">PTIM_SetCurrentValue</a> (uint32_t value)</td></tr>
<tr class="memdesc:a323bf405e32846a7e57344935e51de66"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set current counter value from its COUNTER register.  <a href="#a323bf405e32846a7e57344935e51de66">More...</a><br/></td></tr>
<tr class="separator:a323bf405e32846a7e57344935e51de66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaccd88ab7931c379817f71d7c0183586"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#gaaccd88ab7931c379817f71d7c0183586">PTIM_GetCurrentValue</a> (void)</td></tr>
<tr class="memdesc:gaaccd88ab7931c379817f71d7c0183586"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get current counter value from timers COUNTER register.  <a href="group__PTM__timer__functions.html#gaaccd88ab7931c379817f71d7c0183586">More...</a><br/></td></tr>
<tr class="separator:gaaccd88ab7931c379817f71d7c0183586"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaabc1dba029389fe0e2a6297952df7972"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#gaabc1dba029389fe0e2a6297952df7972">PTIM_SetControl</a> (uint32_t value)</td></tr>
<tr class="memdesc:gaabc1dba029389fe0e2a6297952df7972"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure the timer using its CONTROL register.  <a href="group__PTM__timer__functions.html#gaabc1dba029389fe0e2a6297952df7972">More...</a><br/></td></tr>
<tr class="separator:gaabc1dba029389fe0e2a6297952df7972"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34f0ceea142a4be1479cb552bf8bc4d1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#ga34f0ceea142a4be1479cb552bf8bc4d1">PTIM_GetControl</a> (void)</td></tr>
<tr class="separator:ga34f0ceea142a4be1479cb552bf8bc4d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2c3f9f942e8a08630562f35802dbe942"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="core__ca_8h.html#a2c3f9f942e8a08630562f35802dbe942">PTIM_GetEventFlag</a> (void)</td></tr>
<tr class="separator:a2c3f9f942e8a08630562f35802dbe942"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga59dca62df390bc4bce18559fc7d28578"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PTM__timer__functions.html#ga59dca62df390bc4bce18559fc7d28578">PTIM_ClearEventFlag</a> (void)</td></tr>
<tr class="separator:ga59dca62df390bc4bce18559fc7d28578"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9132cbfe3b2367de3db27daf4cc82ad7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga9132cbfe3b2367de3db27daf4cc82ad7">MMU_XNSection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#ga2fe1157deda82e66b9a1b19772309b63">mmu_execute_Type</a> xn)</td></tr>
<tr class="memdesc:ga9132cbfe3b2367de3db27daf4cc82ad7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section execution-never attribute.  <a href="group__MMU__functions.html#ga9132cbfe3b2367de3db27daf4cc82ad7">More...</a><br/></td></tr>
<tr class="separator:ga9132cbfe3b2367de3db27daf4cc82ad7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd88f4c41b74365c38209692785287d0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gabd88f4c41b74365c38209692785287d0">MMU_DomainSection</a> (uint32_t *descriptor_l1, uint8_t domain)</td></tr>
<tr class="memdesc:gabd88f4c41b74365c38209692785287d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section domain.  <a href="group__MMU__functions.html#gabd88f4c41b74365c38209692785287d0">More...</a><br/></td></tr>
<tr class="separator:gabd88f4c41b74365c38209692785287d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3577aec23189228c9f95abba50c3716d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga3577aec23189228c9f95abba50c3716d">MMU_PSection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#ga06d94c0eaa22d713636acaff81485409">mmu_ecc_check_Type</a> p_bit)</td></tr>
<tr class="memdesc:ga3577aec23189228c9f95abba50c3716d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section parity check.  <a href="group__MMU__functions.html#ga3577aec23189228c9f95abba50c3716d">More...</a><br/></td></tr>
<tr class="separator:ga3577aec23189228c9f95abba50c3716d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga946866c84a72690c385ee07545bf8145"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga946866c84a72690c385ee07545bf8145">MMU_APSection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280">mmu_access_Type</a> user, <a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280">mmu_access_Type</a> priv, uint32_t afe)</td></tr>
<tr class="memdesc:ga946866c84a72690c385ee07545bf8145"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section access privileges.  <a href="group__MMU__functions.html#ga946866c84a72690c385ee07545bf8145">More...</a><br/></td></tr>
<tr class="separator:ga946866c84a72690c385ee07545bf8145"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga29ea426394746cdd6a4b4c14164ec6b9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga29ea426394746cdd6a4b4c14164ec6b9">MMU_SharedSection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#gab884a11fa8d094573ab77fb1c0f8d8a7">mmu_shared_Type</a> s_bit)</td></tr>
<tr class="memdesc:ga29ea426394746cdd6a4b4c14164ec6b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section shareability.  <a href="group__MMU__functions.html#ga29ea426394746cdd6a4b4c14164ec6b9">More...</a><br/></td></tr>
<tr class="separator:ga29ea426394746cdd6a4b4c14164ec6b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ca22117a7f2d3c4d1cd1bf832cc4d2f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga3ca22117a7f2d3c4d1cd1bf832cc4d2f">MMU_GlobalSection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#ga04160605fbe20914c8ef020430684a30">mmu_global_Type</a> g_bit)</td></tr>
<tr class="memdesc:ga3ca22117a7f2d3c4d1cd1bf832cc4d2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section Global attribute.  <a href="group__MMU__functions.html#ga3ca22117a7f2d3c4d1cd1bf832cc4d2f">More...</a><br/></td></tr>
<tr class="separator:ga3ca22117a7f2d3c4d1cd1bf832cc4d2f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84a5a15ee353d70a9b904e3814bd94d8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga84a5a15ee353d70a9b904e3814bd94d8">MMU_SecureSection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#gac3d277641df9fb3bb3b555e2e79dd639">mmu_secure_Type</a> s_bit)</td></tr>
<tr class="memdesc:ga84a5a15ee353d70a9b904e3814bd94d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set section Security attribute.  <a href="group__MMU__functions.html#ga84a5a15ee353d70a9b904e3814bd94d8">More...</a><br/></td></tr>
<tr class="separator:ga84a5a15ee353d70a9b904e3814bd94d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0e0fed40d998757147beb8fcf05a890"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gab0e0fed40d998757147beb8fcf05a890">MMU_XNPage</a> (uint32_t *descriptor_l2, <a class="el" href="group__MMU__defs__gr.html#ga2fe1157deda82e66b9a1b19772309b63">mmu_execute_Type</a> xn, <a class="el" href="group__MMU__defs__gr.html#gab184b824a6d7cb728bd46c6abcd0c21a">mmu_region_size_Type</a> page)</td></tr>
<tr class="memdesc:gab0e0fed40d998757147beb8fcf05a890"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page execution-never attribute.  <a href="group__MMU__functions.html#gab0e0fed40d998757147beb8fcf05a890">More...</a><br/></td></tr>
<tr class="separator:gab0e0fed40d998757147beb8fcf05a890"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga45f5389cb1351bb2806a38ac8c32d416"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga45f5389cb1351bb2806a38ac8c32d416">MMU_DomainPage</a> (uint32_t *descriptor_l1, uint8_t domain)</td></tr>
<tr class="memdesc:ga45f5389cb1351bb2806a38ac8c32d416"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page domain.  <a href="group__MMU__functions.html#ga45f5389cb1351bb2806a38ac8c32d416">More...</a><br/></td></tr>
<tr class="separator:ga45f5389cb1351bb2806a38ac8c32d416"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab15289c416609cd56dde816b39a4cea4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gab15289c416609cd56dde816b39a4cea4">MMU_PPage</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#ga06d94c0eaa22d713636acaff81485409">mmu_ecc_check_Type</a> p_bit)</td></tr>
<tr class="memdesc:gab15289c416609cd56dde816b39a4cea4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page parity check.  <a href="group__MMU__functions.html#gab15289c416609cd56dde816b39a4cea4">More...</a><br/></td></tr>
<tr class="separator:gab15289c416609cd56dde816b39a4cea4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac7c88d4d613350059b4d77814ea2c7a0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gac7c88d4d613350059b4d77814ea2c7a0">MMU_APPage</a> (uint32_t *descriptor_l2, <a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280">mmu_access_Type</a> user, <a class="el" href="group__MMU__defs__gr.html#ga2ee598252f996e4f96640b096291d280">mmu_access_Type</a> priv, uint32_t afe)</td></tr>
<tr class="memdesc:gac7c88d4d613350059b4d77814ea2c7a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page access privileges.  <a href="group__MMU__functions.html#gac7c88d4d613350059b4d77814ea2c7a0">More...</a><br/></td></tr>
<tr class="separator:gac7c88d4d613350059b4d77814ea2c7a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa19560532778e4fdc667e56fd2dd378"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gaaa19560532778e4fdc667e56fd2dd378">MMU_SharedPage</a> (uint32_t *descriptor_l2, <a class="el" href="group__MMU__defs__gr.html#gab884a11fa8d094573ab77fb1c0f8d8a7">mmu_shared_Type</a> s_bit)</td></tr>
<tr class="memdesc:gaaa19560532778e4fdc667e56fd2dd378"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page shareability.  <a href="group__MMU__functions.html#gaaa19560532778e4fdc667e56fd2dd378">More...</a><br/></td></tr>
<tr class="separator:gaaa19560532778e4fdc667e56fd2dd378"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14dfeaf8983de57521aaa66c19dd43c9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga14dfeaf8983de57521aaa66c19dd43c9">MMU_GlobalPage</a> (uint32_t *descriptor_l2, <a class="el" href="group__MMU__defs__gr.html#ga04160605fbe20914c8ef020430684a30">mmu_global_Type</a> g_bit)</td></tr>
<tr class="memdesc:ga14dfeaf8983de57521aaa66c19dd43c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page Global attribute.  <a href="group__MMU__functions.html#ga14dfeaf8983de57521aaa66c19dd43c9">More...</a><br/></td></tr>
<tr class="separator:ga14dfeaf8983de57521aaa66c19dd43c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2c1887ed6aaff0a51e3effc3db595c94"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga2c1887ed6aaff0a51e3effc3db595c94">MMU_SecurePage</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#gac3d277641df9fb3bb3b555e2e79dd639">mmu_secure_Type</a> s_bit)</td></tr>
<tr class="memdesc:ga2c1887ed6aaff0a51e3effc3db595c94"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page Security attribute.  <a href="group__MMU__functions.html#ga2c1887ed6aaff0a51e3effc3db595c94">More...</a><br/></td></tr>
<tr class="separator:ga2c1887ed6aaff0a51e3effc3db595c94"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga353d3d794bcd1b35b3b5aeb73d6feb08"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga353d3d794bcd1b35b3b5aeb73d6feb08">MMU_MemorySection</a> (uint32_t *descriptor_l1, <a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2">mmu_memory_Type</a> mem, <a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584">mmu_cacheability_Type</a> outer, <a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584">mmu_cacheability_Type</a> inner)</td></tr>
<tr class="memdesc:ga353d3d794bcd1b35b3b5aeb73d6feb08"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Section memory attributes.  <a href="group__MMU__functions.html#ga353d3d794bcd1b35b3b5aeb73d6feb08">More...</a><br/></td></tr>
<tr class="separator:ga353d3d794bcd1b35b3b5aeb73d6feb08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a2946f7c93bcb05cdd20be691a54b8c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga9a2946f7c93bcb05cdd20be691a54b8c">MMU_MemoryPage</a> (uint32_t *descriptor_l2, <a class="el" href="group__MMU__defs__gr.html#ga83ac8de9263f89879079da521e86d5f2">mmu_memory_Type</a> mem, <a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584">mmu_cacheability_Type</a> outer, <a class="el" href="group__MMU__defs__gr.html#ga11c86b7b193efb2c59b6a2179a02f584">mmu_cacheability_Type</a> inner, <a class="el" href="group__MMU__defs__gr.html#gab184b824a6d7cb728bd46c6abcd0c21a">mmu_region_size_Type</a> page)</td></tr>
<tr class="memdesc:ga9a2946f7c93bcb05cdd20be691a54b8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set 4k/64k page memory attributes.  <a href="group__MMU__functions.html#ga9a2946f7c93bcb05cdd20be691a54b8c">More...</a><br/></td></tr>
<tr class="separator:ga9a2946f7c93bcb05cdd20be691a54b8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f21eee79309cf8cde694d0d7e1205bd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga4f21eee79309cf8cde694d0d7e1205bd">MMU_GetSectionDescriptor</a> (uint32_t *descriptor, <a class="el" href="structmmu__region__attributes__Type.html">mmu_region_attributes_Type</a> reg)</td></tr>
<tr class="memdesc:ga4f21eee79309cf8cde694d0d7e1205bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a L1 section descriptor.  <a href="group__MMU__functions.html#ga4f21eee79309cf8cde694d0d7e1205bd">More...</a><br/></td></tr>
<tr class="separator:ga4f21eee79309cf8cde694d0d7e1205bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2fcfb63c7019665b8a352d54f55d740"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gaa2fcfb63c7019665b8a352d54f55d740">MMU_GetPageDescriptor</a> (uint32_t *descriptor, uint32_t *descriptor2, <a class="el" href="structmmu__region__attributes__Type.html">mmu_region_attributes_Type</a> reg)</td></tr>
<tr class="memdesc:gaa2fcfb63c7019665b8a352d54f55d740"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a L1 and L2 4k/64k page descriptor.  <a href="group__MMU__functions.html#gaa2fcfb63c7019665b8a352d54f55d740">More...</a><br/></td></tr>
<tr class="separator:gaa2fcfb63c7019665b8a352d54f55d740"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaff28ea191391cbbd389d74327961753"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#gaaff28ea191391cbbd389d74327961753">MMU_TTSection</a> (uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)</td></tr>
<tr class="memdesc:gaaff28ea191391cbbd389d74327961753"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a 1MB Section.  <a href="group__MMU__functions.html#gaaff28ea191391cbbd389d74327961753">More...</a><br/></td></tr>
<tr class="separator:gaaff28ea191391cbbd389d74327961753"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga823cca9649a28bab8a90f8bd9bb92d83"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga823cca9649a28bab8a90f8bd9bb92d83">MMU_TTPage4k</a> (uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2)</td></tr>
<tr class="memdesc:ga823cca9649a28bab8a90f8bd9bb92d83"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a 4k page entry.  <a href="group__MMU__functions.html#ga823cca9649a28bab8a90f8bd9bb92d83">More...</a><br/></td></tr>
<tr class="separator:ga823cca9649a28bab8a90f8bd9bb92d83"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga48c509501f94a3f7316e79f8ccd34184"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga48c509501f94a3f7316e79f8ccd34184">MMU_TTPage64k</a> (uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2)</td></tr>
<tr class="memdesc:ga48c509501f94a3f7316e79f8ccd34184"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a 64k page entry.  <a href="group__MMU__functions.html#ga48c509501f94a3f7316e79f8ccd34184">More...</a><br/></td></tr>
<tr class="separator:ga48c509501f94a3f7316e79f8ccd34184"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga63334cbd77d310d078eb226c7542b96b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga63334cbd77d310d078eb226c7542b96b">MMU_Enable</a> (void)</td></tr>
<tr class="memdesc:ga63334cbd77d310d078eb226c7542b96b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable MMU.  <a href="group__MMU__functions.html#ga63334cbd77d310d078eb226c7542b96b">More...</a><br/></td></tr>
<tr class="separator:ga63334cbd77d310d078eb226c7542b96b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a2badd06531e04f559b97fdb2aea154"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga2a2badd06531e04f559b97fdb2aea154">MMU_Disable</a> (void)</td></tr>
<tr class="memdesc:ga2a2badd06531e04f559b97fdb2aea154"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable MMU.  <a href="group__MMU__functions.html#ga2a2badd06531e04f559b97fdb2aea154">More...</a><br/></td></tr>
<tr class="separator:ga2a2badd06531e04f559b97fdb2aea154"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9de65bea1cabf73dc4302e0e727cc8c3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MMU__functions.html#ga9de65bea1cabf73dc4302e0e727cc8c3">MMU_InvalidateTLB</a> (void)</td></tr>
<tr class="memdesc:ga9de65bea1cabf73dc4302e0e727cc8c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate entire unified TLB.  <a href="group__MMU__functions.html#ga9de65bea1cabf73dc4302e0e727cc8c3">More...</a><br/></td></tr>
<tr class="separator:ga9de65bea1cabf73dc4302e0e727cc8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.0.2 </dd></dl>
<dl class="section date"><dt>Date</dt><dd>12. November 2018 </dd></dl>
</div><h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="add5658d95f6b79934202e6fbf1795b12"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __CORE_CA_H_DEPENDANT</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af6738f04c5c33edae09174f235ef3e14"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __CORE_CA_H_GENERIC</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ac1ba8a48ca926bddc88be9bfd7d42641"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __FPU_PRESENT&#160;&#160;&#160;0U</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa167d0f532a7c2b2e3a6395db2fa0776"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __FPU_USED&#160;&#160;&#160;0U</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a6690a7e24ea0ec4b36a8fb077d01a820"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __GIC_PRESENT&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af63697ed9952cc71e1225efe205f6cd3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __I&#160;&#160;&#160;volatile</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a4cc1649793116d7c2d8afce7a4ffce43"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __IM&#160;&#160;&#160;volatile const</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aec43007d9998a0a0e01faede4133d6be"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __IO&#160;&#160;&#160;volatile</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab6caba5853a60a17e8e04499b52bf691"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __IOM&#160;&#160;&#160;volatile</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7e25d9380f9ef903923964322e71f2f6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __O&#160;&#160;&#160;volatile</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0ea2009ed8fd9ef35b48708280fdb758"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __OM&#160;&#160;&#160;volatile</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0e57ca9f1bc10c2de05d383d2c76267a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __TIM_PRESENT&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a139b6e261c981f014f386927ca4a8444"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define _FLD2VAL</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">field, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">value&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;(((uint32_t)(value) &amp; field ## _Msk) &gt;&gt; field ## _Pos)</td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">field</td><td>Name of the register bit field. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value of register. This parameter is interpreted as an uint32_t type. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Masked and shifted bit field value. </dd></dl>

</div>
</div>
<a class="anchor" id="a286e3b913dbd236c7f48ea70c8821f4e"></a>
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          <td class="memname">#define _VAL2FLD</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">field, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">value&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;(((uint32_t)(value) &lt;&lt; field ## _Pos) &amp; field ## _Msk)</td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">field</td><td>Name of the register bit field. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value of the bit field. This parameter is interpreted as an uint32_t type. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Masked and shifted value. </dd></dl>

</div>
</div>
<a class="anchor" id="aea0bba954f8c3b032cf9a6540277ddef"></a>
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          <td class="memname">#define GIC_GetSecurity&#160;&#160;&#160;<a class="el" href="core__ca_8h.html#ae161d7a866cb61f92b808ae98fa7c812">GIC_GetGroup</a></td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a647b0a71258678d75aed0aadd5801612"></a>
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          <td class="memname">#define GIC_SetSecurity&#160;&#160;&#160;<a class="el" href="core__ca_8h.html#ab875d63dc51a75149802945bb00e2695">GIC_SetGroup</a></td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a234fceea67b5d6c41b0875852d86cc70"></a>
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          <td class="memname">#define PAGE_4K_TEXCB_MASK&#160;&#160;&#160;(0xFFFFFE33)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a666e7d1971403995104586f35d56590b"></a>
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          <td class="memname">#define PAGE_64K_TEXCB_MASK&#160;&#160;&#160;(0xFFFF8FF3)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af7d3ee23adcaf9221967791f0e64d830"></a>
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          <td class="memname">#define PAGE_AP_MASK&#160;&#160;&#160;(0xFFFFFDCF)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0a48a4e79188149fbe886a698b6d9cb4"></a>
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          <td class="memname">#define PAGE_DOMAIN_MASK&#160;&#160;&#160;(0xFFFFFE1F)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9fe764cc3a117a9ab93a301de8bceed1"></a>
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          <td class="memname">#define PAGE_L1_MASK&#160;&#160;&#160;(0xFFFFFFFC)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="abd292694d0155e3b0d4c12895a6c8fa6"></a>
<div class="memitem">
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          <td class="memname">#define PAGE_L2_4K_MASK&#160;&#160;&#160;(0xFFFFFFFD)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab3a82626ee70e38285852a1128b75c7a"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define PAGE_L2_64K_MASK&#160;&#160;&#160;(0xFFFFFFFC)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="add5d44ba746fe4d17d8b06a1086aa853"></a>
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          <td class="memname">#define PAGE_NG_MASK&#160;&#160;&#160;(0xFFFFF7FF)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a618b1432615c3242f53360d4364c5797"></a>
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          <td class="memname">#define PAGE_NS_MASK&#160;&#160;&#160;(0xFFFFFFF7)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a604f4f13fcb78ff08d65ef4a1a3f7933"></a>
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          <td class="memname">#define PAGE_P_MASK&#160;&#160;&#160;(0xFFFFFDFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ac44cd885615a54131c372abfdc2d5c66"></a>
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          <td class="memname">#define PAGE_S_MASK&#160;&#160;&#160;(0xFFFFFBFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa488ef0c274f8ae125f61129745b1629"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define PAGE_TEXCB_MASK&#160;&#160;&#160;(0xFFFF8FF3)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a522f61b0d301d6f69c33a629e1699c7e"></a>
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          <td class="memname">#define PAGE_XN_4K_MASK&#160;&#160;&#160;(0xFFFFFFFE)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ae0445cb4d6dc78359074cbb2776e3b5c"></a>
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          <td class="memname">#define PAGE_XN_64K_MASK&#160;&#160;&#160;(0xFFFF7FFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

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<a class="anchor" id="af7f66fda711fd46e157dbb6c1af88e04"></a>
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          <td class="memname">#define RESERVED</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">N, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">T&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;T RESERVED##N;</td>
        </tr>
      </table>
</div><div class="memdoc">

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          <td class="memname">#define SECTION_AP_MASK&#160;&#160;&#160;(0xFFFF73FF)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a90a30c02512cbea24791212af9f2cd9f"></a>
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        <tr>
          <td class="memname">#define SECTION_DOMAIN_MASK&#160;&#160;&#160;(0xFFFFFE1F)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a16f225cca51a80c5cf1c9c002cfd2dba"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define SECTION_MASK&#160;&#160;&#160;(0xFFFFFFFC)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
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<a class="anchor" id="a01ceacdb3888d7cddcfeccfea9eb3658"></a>
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        <tr>
          <td class="memname">#define SECTION_NG_MASK&#160;&#160;&#160;(0xFFFDFFFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

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          <td class="memname">#define section_normal_nc</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">descriptor_l1, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">region&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a057533871fa1af6db7a27b39d976ac95"></a>
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          <td class="memname">#define SECTION_NS_MASK&#160;&#160;&#160;(0xFFF7FFFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

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</div>
<a class="anchor" id="ad32d146d84a9d7f964f28f1dadc98bcb"></a>
<div class="memitem">
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        <tr>
          <td class="memname">#define SECTION_P_MASK&#160;&#160;&#160;(0xFFFFFDFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
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<a class="anchor" id="a42d3645aad501af4ef447186c01685b7"></a>
<div class="memitem">
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          <td class="memname">#define SECTION_S_MASK&#160;&#160;&#160;(0xFFFEFFFF)</td>
        </tr>
      </table>
</div><div class="memdoc">

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<a class="anchor" id="a3052ba3d97ad157189a6c6fce15b1b6a"></a>
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          <td class="memname">#define SECTION_TEXCB_MASK&#160;&#160;&#160;(0xFFFF8FF3)</td>
        </tr>
      </table>
</div><div class="memdoc">

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          <td class="memname">#define SECTION_XN_MASK&#160;&#160;&#160;(0xFFFFFFEF)</td>
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      </table>
</div><div class="memdoc">

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</div>
<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void __L1C_MaintainDCacheSetWay </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>level</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>maint</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">level</td><td>cache level to be maintained </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">maint</td><td>0 - invalidate, 1 - clean, otherwise - invalidate and clean </td></tr>
  </table>
  </dd>
</dl>

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      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint8_t __log2_up </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>n</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<ul>
<li>log(0) =&gt; 0</li>
<li>log(1) =&gt; 0</li>
<li>log(2) =&gt; 1</li>
<li>log(3) =&gt; 2</li>
<li>log(4) =&gt; 2</li>
<li>log(5) =&gt; 3 : :</li>
<li>log(16) =&gt; 4</li>
<li>log(32) =&gt; 5 : : <dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">n</td><td>input value parameter </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>log2(n) </dd></dl>
</li>
</ul>

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        <tr>
          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetConfiguration </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
          <td class="paramname"><em>IRQn</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt to acquire the configuration for. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1) Bit 1: 0 - level sensitive, 1 - edge triggered </dd></dl>

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetEnableIRQ </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
          <td class="paramname"><em>IRQn</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be queried. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 - interrupt is not enabled, 1 - interrupt is enabled. </dd></dl>

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        <tr>
          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetGroup </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
          <td class="paramname"><em>IRQn</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be queried. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 - Group 0, 1 - Group 1 </dd></dl>

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        <tr>
          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetPendingIRQ </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
          <td class="paramname"><em>IRQn</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be queried. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 - interrupt is not pending, 1 - interrupt is pendig. </dd></dl>

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetConfiguration </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
          <td class="paramname"><em>IRQn</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>int_config</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be configured. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">int_config</td><td>Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1) Bit 1: 0 - level sensitive, 1 - edge triggered </td></tr>
  </table>
  </dd>
</dl>

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        <tr>
          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetGroup </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
          <td class="paramname"><em>IRQn</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>group</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be queried. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">group</td><td>Interrupt group number: 0 - Group 0, 1 - Group 1 </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t PTIM_GetEventFlag </td>
          <td>(</td>
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<p>ref <a class="el" href="structTimer__Type.html#a91845c88231f4f337be2810d73bc79e4" title="Offset: 0x008 (R/W) Private Timer Control Register. ">Timer_Type::CONTROL</a> Get the event flag in timers ISR register. </p>
<dl class="section return"><dt>Returns</dt><dd>0 - flag is not set, 1- flag is set </dd></dl>

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void PTIM_SetCurrentValue </td>
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